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| author | Igor Mammedov <imammedo@redhat.com> | 2025-08-21 17:56:03 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-08-29 12:48:14 +0200 |
| commit | 87511341c30d8c9c77178db16491a0ccacc5d64b (patch) | |
| tree | f2a99d1629f140c57cd7bdfcae4f5fd681763d94 /target/openrisc/cpu.c | |
| parent | b8217bbaf2bafef1a4f54082a3548613eeef8f2b (diff) | |
| download | focaccia-qemu-87511341c30d8c9c77178db16491a0ccacc5d64b.tar.gz focaccia-qemu-87511341c30d8c9c77178db16491a0ccacc5d64b.zip | |
add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide
The helpers form load-acquire/store-release pair and ensure that appropriate barriers are in place in case checks happen outside of BQL. Use them to replace open-coded checkers/setters across the code, to make sure that barriers are not missed. Helpers also make code a bit more readable. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Link: https://lore.kernel.org/r/20250821155603.2422553-1-imammedo@redhat.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/openrisc/cpu.c')
| -rw-r--r-- | target/openrisc/cpu.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index dfbb2df643..9bbfe22ed3 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -78,8 +78,7 @@ static void openrisc_restore_state_to_opc(CPUState *cs, #ifndef CONFIG_USER_ONLY static bool openrisc_cpu_has_work(CPUState *cs) { - return cs->interrupt_request & (CPU_INTERRUPT_HARD | - CPU_INTERRUPT_TIMER); + return cpu_test_interrupt(cs, CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER); } #endif /* !CONFIG_USER_ONLY */ |