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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-01-16 18:23:02 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-01-16 18:23:02 +0000 |
| commit | a8c611e1133f97c979922f41103f79309339dc27 (patch) | |
| tree | 73d1c11a4e395d2d71a4c6a5b77018986f8613d8 /target/openrisc/cpu.c | |
| parent | 2ccede18bd24fce5db83fef3674563a1f256717b (diff) | |
| parent | d10eb08f5d8389c814b554d01aa2882ac58221bf (diff) | |
| download | focaccia-qemu-a8c611e1133f97c979922f41103f79309339dc27.tar.gz focaccia-qemu-a8c611e1133f97c979922f41103f79309339dc27.zip | |
Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1' into staging
This is the same as the v3 posted except a re-base and a few extra signoffs # gpg: Signature made Fri 13 Jan 2017 14:26:46 GMT # gpg: using RSA key 0xFBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1: cputlb: drop flush_global flag from tlb_flush cpu_common_reset: wrap TCG specific code in tcg_enabled() qom/cpu: move tlb_flush to cpu_common_reset Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/openrisc/cpu.c')
| -rw-r--r-- | target/openrisc/cpu.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 698e87bb25..422139d29f 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -44,14 +44,7 @@ static void openrisc_cpu_reset(CPUState *s) occ->parent_reset(s); -#ifndef CONFIG_USER_ONLY - memset(&cpu->env, 0, offsetof(CPUOpenRISCState, tlb)); -#else - memset(&cpu->env, 0, offsetof(CPUOpenRISCState, irq)); -#endif - - tlb_flush(s, 1); - /*tb_flush(&cpu->env); FIXME: Do we need it? */ + memset(&cpu->env, 0, offsetof(CPUOpenRISCState, end_reset_fields)); cpu->env.pc = 0x100; cpu->env.sr = SR_FO | SR_SM; |