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authorStafford Horne <shorne@gmail.com>2022-06-15 08:43:56 +0900
committerStafford Horne <shorne@gmail.com>2022-09-04 07:02:57 +0100
commit6a0fc96ad2b16a264ead6b696bdb91a963450dbb (patch)
treebc0788cebe1049a888fce15c29ba1c0cfdc57867 /target/openrisc/cpu.h
parentbbe6855ef80f61c6b00da22aa0cd550d79d8e381 (diff)
downloadfocaccia-qemu-6a0fc96ad2b16a264ead6b696bdb91a963450dbb.tar.gz
focaccia-qemu-6a0fc96ad2b16a264ead6b696bdb91a963450dbb.zip
target/openrisc: Enable MTTCG
This patch enables multithread TCG for OpenRISC.  Since the or1k shared
syncrhonized timer can be updated from each vCPU via helpers we use a
mutex to synchronize updates.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc/cpu.h')
-rw-r--r--target/openrisc/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index b9584f10d4..1d5efa5ca2 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -25,6 +25,8 @@
 #include "hw/core/cpu.h"
 #include "qom/object.h"
 
+#define TCG_GUEST_DEFAULT_MO (0)
+
 #define TYPE_OPENRISC_CPU "or1k-cpu"
 
 OBJECT_DECLARE_CPU_TYPE(OpenRISCCPU, OpenRISCCPUClass, OPENRISC_CPU)