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authorRichard Henderson <rth@twiddle.net>2015-02-18 18:47:35 -0800
committerRichard Henderson <rth@twiddle.net>2017-02-14 08:15:00 +1100
commit762e22edcd021035e1dbcf0dbc31b4794c5c1027 (patch)
tree3f2fb564feb01629b7f125ce88ee928ee25729b2 /target/openrisc/cpu.h
parentcc5de49ebe5b2881b88b22c13410f13657b472e0 (diff)
downloadfocaccia-qemu-762e22edcd021035e1dbcf0dbc31b4794c5c1027.tar.gz
focaccia-qemu-762e22edcd021035e1dbcf0dbc31b4794c5c1027.zip
target/openrisc: Fix madd
Note that the specification for lf.madd.s is confused.  It's
the only mention of supposed FPMADDHI/FPMADDLO special registers.
On the other hand, or1ksim implements a somewhat normal non-fused
multiply and add.  Mirror that.

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/openrisc/cpu.h')
-rw-r--r--target/openrisc/cpu.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 9528277c87..069403884b 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -279,9 +279,6 @@ typedef struct CPUOpenRISCState {
 
     uint64_t mac;             /* Multiply registers MACHI:MACLO */
 
-    target_ulong fpmaddhi;    /* Multiply and add float register FPMADDHI */
-    target_ulong fpmaddlo;    /* Multiply and add float register FPMADDLO */
-
     target_ulong epcr;        /* Exception PC register */
     target_ulong eear;        /* Exception EA register */