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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-08-26 15:10:10 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-09-04 12:58:55 -0700 |
| commit | a465772eea8fef59bef9a9fe424b1af4866991f5 (patch) | |
| tree | 67872aa23218d239cfbd37c28b538d3ae063ea1f /target/openrisc/cpu.h | |
| parent | 2b13b4b93dc924a139d7a9350cd13c2c9479d03b (diff) | |
| download | focaccia-qemu-a465772eea8fef59bef9a9fe424b1af4866991f5.tar.gz focaccia-qemu-a465772eea8fef59bef9a9fe424b1af4866991f5.zip | |
target/openrisc: Implement move to/from FPCSR
Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/openrisc/cpu.h')
| -rw-r--r-- | target/openrisc/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 71c5959828..0ad02eab79 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -413,6 +413,8 @@ static inline void cpu_set_sr(CPUOpenRISCState *env, uint32_t val) env->sr = (val & ~(SR_F | SR_CY | SR_OV)) | SR_FO; } +void cpu_set_fpcsr(CPUOpenRISCState *env, uint32_t val); + #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 #endif /* OPENRISC_CPU_H */ |