diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2024-12-18 23:28:47 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2025-03-11 22:43:30 +1000 |
| commit | d3ce7dc9e282e1785c7a6da73b3ebb1da5c34971 (patch) | |
| tree | 7c7ad4056f72b39dce4a96eb1e35f3a9494f62d5 /target/ppc/cpu_init.c | |
| parent | a1750b2cba9c70191221f206bfbed277251dd644 (diff) | |
| download | focaccia-qemu-d3ce7dc9e282e1785c7a6da73b3ebb1da5c34971.tar.gz focaccia-qemu-d3ce7dc9e282e1785c7a6da73b3ebb1da5c34971.zip | |
target/ppc: Add Power9/10 power management SPRs
Linux power management code accesses these registers for pstate management. Wire up a very simple implementation. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- After OCC fixes in QEMU pnv model and skiboot (since they have suffered some bitrot), Linux will start performing PM SPR accesses. This is a very simple implementation that makes it a bit happier. Thanks, Nick
Diffstat (limited to 'target/ppc/cpu_init.c')
| -rw-r--r-- | target/ppc/cpu_init.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 1780cabfc6..54035c7bbb 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6451,6 +6451,17 @@ static void register_power9_common_sprs(CPUPPCState *env) spr_read_generic, spr_write_generic, KVM_REG_PPC_PSSCR, 0); + spr_register_hv(env, SPR_PMSR, "PMSR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_pmsr, SPR_NOACCESS, + 0); + spr_register_hv(env, SPR_PMCR, "PMCR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_pmcr, + PPC_BIT(63)); /* Version 1 (POWER9/10) */ + } static void init_proc_POWER9(CPUPPCState *env) |