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| author | Michael Tokarev <mjt@tls.msk.ru> | 2023-07-14 14:18:16 +0300 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2023-09-20 07:54:34 +0300 |
| commit | e6a19a6477407e57b4deb61aaa497a14d7db9626 (patch) | |
| tree | 212011b588fa61ddd4a1cd405f264e7441d9643f /target/ppc/cpu_init.c | |
| parent | 4907644841e3200aea6475c0f72d3d987e9f3d93 (diff) | |
| download | focaccia-qemu-e6a19a6477407e57b4deb61aaa497a14d7db9626.tar.gz focaccia-qemu-e6a19a6477407e57b4deb61aaa497a14d7db9626.zip | |
ppc: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/cpu_init.c')
| -rw-r--r-- | target/ppc/cpu_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 7ab5ee92d9..c62bf0e437 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5347,7 +5347,7 @@ static void register_970_lpar_sprs(CPUPPCState *env) static void register_power5p_lpar_sprs(CPUPPCState *env) { #if !defined(CONFIG_USER_ONLY) - /* Logical partitionning */ + /* Logical partitioning */ spr_register_kvm_hv(env, SPR_LPCR, "LPCR", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, @@ -5760,7 +5760,7 @@ static void register_power9_mmu_sprs(CPUPPCState *env) static void register_power10_hash_sprs(CPUPPCState *env) { /* - * it's the OS responsability to generate a random value for the registers + * it's the OS responsibility to generate a random value for the registers * in each process' context. So, initialize it with 0 here. */ uint64_t hashkeyr_initial_value = 0, hashpkeyr_initial_value = 0; |