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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-02-10 10:11:16 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-06 15:46:18 +0100 |
| commit | 3bbcc0f732a173f164628243c6345b659c08900d (patch) | |
| tree | 184706c819b5ea941aa252544ceba17b219ae1ca /target/riscv/cpu.c | |
| parent | 05769aae6288a69ba04b0162ed0a15b08b2b7878 (diff) | |
| download | focaccia-qemu-3bbcc0f732a173f164628243c6345b659c08900d.tar.gz focaccia-qemu-3bbcc0f732a173f164628243c6345b659c08900d.zip | |
target/riscv: Declare RISCVCPUClass::misa_mxl_max as RISCVMXL
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250210133134.90879-5-philmd@linaro.org>
Diffstat (limited to 'target/riscv/cpu.c')
| -rw-r--r-- | target/riscv/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 6da391738f..d4f01965df 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -3056,7 +3056,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) { RISCVCPUClass *mcc = RISCV_CPU_CLASS(c); - mcc->misa_mxl_max = (uint32_t)(uintptr_t)data; + mcc->misa_mxl_max = (RISCVMXL)(uintptr_t)data; riscv_cpu_validate_misa_mxl(mcc); } |