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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2025-04-01 10:09:30 +0200
committerRichard Henderson <richard.henderson@linaro.org>2025-04-23 15:04:57 -0700
commitf1a1c2b9586f6402fa1447c611c9f2d77e648ce9 (patch)
tree9b76598b97114859c38043695aadebd4c892b3c2 /target/rx/cpu.c
parentbf8dc33bbca3d84251d40bd81fa1d832b3171ffa (diff)
downloadfocaccia-qemu-f1a1c2b9586f6402fa1447c611c9f2d77e648ce9.tar.gz
focaccia-qemu-f1a1c2b9586f6402fa1447c611c9f2d77e648ce9.zip
target/rx: Restrict SoftMMU mmu_index() to TCG
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-18-philmd@linaro.org>
Diffstat (limited to 'target/rx/cpu.c')
-rw-r--r--target/rx/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index a240b3b3ce..51743020d4 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -207,6 +207,7 @@ static const TCGCPUOps rx_tcg_ops = {
     .translate_code = rx_translate_code,
     .synchronize_from_tb = rx_cpu_synchronize_from_tb,
     .restore_state_to_opc = rx_restore_state_to_opc,
+    .mmu_index = rx_cpu_mmu_index,
     .tlb_fill = rx_cpu_tlb_fill,
 
     .cpu_exec_interrupt = rx_cpu_exec_interrupt,
@@ -227,7 +228,6 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data)
                                        &rcc->parent_phases);
 
     cc->class_by_name = rx_cpu_class_by_name;
-    cc->mmu_index = rx_cpu_mmu_index;
     cc->dump_state = rx_cpu_dump_state;
     cc->set_pc = rx_cpu_set_pc;
     cc->get_pc = rx_cpu_get_pc;