diff options
| author | Artyom Tarasenko <atar4qemu@gmail.com> | 2016-06-07 18:34:49 +0200 |
|---|---|---|
| committer | Artyom Tarasenko <atar4qemu@gmail.com> | 2017-01-18 22:03:44 +0100 |
| commit | cbc3a6a4cc675516328a2b0d3602355d68b6302d (patch) | |
| tree | 837af98184dabc03c037428d2cfd8f0bf6248df6 /target/sparc/cpu.h | |
| parent | 6e040755f12eba34d2fa3d56b18de32d63fea631 (diff) | |
| download | focaccia-qemu-cbc3a6a4cc675516328a2b0d3602355d68b6302d.tar.gz focaccia-qemu-cbc3a6a4cc675516328a2b0d3602355d68b6302d.zip | |
target-sparc: implement UA2005 GL register
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Diffstat (limited to 'target/sparc/cpu.h')
| -rw-r--r-- | target/sparc/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index f173dd6f04..857e93b12e 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -515,6 +515,7 @@ struct CPUSPARCState { uint64_t bgregs[8]; /* backup for normal global registers */ uint64_t igregs[8]; /* interrupt general registers */ uint64_t mgregs[8]; /* mmu general registers */ + uint64_t glregs[8 * MAXTL_MAX]; uint64_t fprs; uint64_t tick_cmpr, stick_cmpr; CPUTimer *tick, *stick; @@ -615,6 +616,7 @@ void cpu_put_ccr(CPUSPARCState *env1, target_ulong val); target_ulong cpu_get_cwp64(CPUSPARCState *env1); void cpu_put_cwp64(CPUSPARCState *env1, int cwp); void cpu_change_pstate(CPUSPARCState *env1, uint32_t new_pstate); +void cpu_gl_switch_gregs(CPUSPARCState *env, uint32_t new_gl); #endif int cpu_cwp_inc(CPUSPARCState *env1, int cwp); int cpu_cwp_dec(CPUSPARCState *env1, int cwp); |