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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-12-21 16:50:26 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-12-24 08:32:15 -0800 |
| commit | e4a8e093dc74be049f4829831dce76e5edab0003 (patch) | |
| tree | 20354b9913086ac3a535e06e4d28057f88710d14 /target/sparc | |
| parent | 59abfb444e1d9654e15f85c50d09a3366e4c1c1e (diff) | |
| download | focaccia-qemu-e4a8e093dc74be049f4829831dce76e5edab0003.tar.gz focaccia-qemu-e4a8e093dc74be049f4829831dce76e5edab0003.zip | |
accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core
Convert all targets simultaneously, as the gen_intermediate_code function disappears from the target. While there are possible workarounds, they're larger than simply performing the conversion. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/sparc')
| -rw-r--r-- | target/sparc/cpu.c | 1 | ||||
| -rw-r--r-- | target/sparc/cpu.h | 2 | ||||
| -rw-r--r-- | target/sparc/translate.c | 4 |
3 files changed, 5 insertions, 2 deletions
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 373a335c39..fbd38ec334 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -996,6 +996,7 @@ static const struct SysemuCPUOps sparc_sysemu_ops = { static const TCGCPUOps sparc_tcg_ops = { .initialize = sparc_tcg_init, + .translate_code = sparc_translate_code, .synchronize_from_tb = sparc_cpu_synchronize_from_tb, .restore_state_to_opc = sparc_restore_state_to_opc, diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 5c981234bb..dda811503b 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -609,6 +609,8 @@ int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr, /* translate.c */ void sparc_tcg_init(void); +void sparc_translate_code(CPUState *cs, TranslationBlock *tb, + int *max_insns, vaddr pc, void *host_pc); /* fop_helper.c */ target_ulong cpu_get_fsr(CPUSPARCState *); diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 465e20f4f3..7e5c7351cb 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -5819,8 +5819,8 @@ static const TranslatorOps sparc_tr_ops = { .tb_stop = sparc_tr_tb_stop, }; -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int *max_insns, - vaddr pc, void *host_pc) +void sparc_translate_code(CPUState *cs, TranslationBlock *tb, + int *max_insns, vaddr pc, void *host_pc) { DisasContext dc = {}; |