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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-01-28 15:11:04 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-01-28 15:11:04 +0000 |
| commit | 4c60e3289875ae6c516a37523bcecb87f68ce67c (patch) | |
| tree | 43b687b4d1bfe827bae9684f23d313eebed02f3e /target | |
| parent | 750fe5989f9efffce86368c6feac013f8b7b433c (diff) | |
| parent | b1af755c33bf0d690553a5ccd93689dfd15a98e8 (diff) | |
| download | focaccia-qemu-4c60e3289875ae6c516a37523bcecb87f68ce67c.tar.gz focaccia-qemu-4c60e3289875ae6c516a37523bcecb87f68ce67c.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-pa-20200127' into staging
Improve LASI emulation Add Artist graphics Fix main memory allocation Improve LDCW emulation wrt real hw # gpg: Signature made Mon 27 Jan 2020 18:53:35 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-pa-20200127: target/hppa: Allow, but diagnose, LDCW aligned only mod 4 hw/hppa/machine: Map the PDC memory region with higher priority hw/hppa/machine: Restrict the total memory size to 3GB hw/hppa/machine: Correctly check the firmware is in PDC range hppa: Add emulation of Artist graphics seabios-hppa: update to latest version hppa: Switch to tulip NIC by default hppa: add emulation of LASI PS2 controllers ps2: accept 'Set Key Make and Break' commands hppa: Add support for LASI chip with i82596 NIC hw/hppa/dino.c: Improve emulation of Dino PCI chip Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/hppa/helper.h | 2 | ||||
| -rw-r--r-- | target/hppa/op_helper.c | 9 | ||||
| -rw-r--r-- | target/hppa/translate.c | 15 |
3 files changed, 25 insertions, 1 deletions
diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 38d834ef6b..2d483aab58 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -17,6 +17,8 @@ DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tr) DEF_HELPER_FLAGS_3(stby_e, TCG_CALL_NO_WG, void, env, tl, tr) DEF_HELPER_FLAGS_3(stby_e_parallel, TCG_CALL_NO_WG, void, env, tl, tr) +DEF_HELPER_FLAGS_1(ldc_check, TCG_CALL_NO_RWG, void, tl) + DEF_HELPER_FLAGS_4(probe, TCG_CALL_NO_WG, tr, env, tl, i32, i32) DEF_HELPER_FLAGS_1(loaded_fr0, TCG_CALL_NO_RWG, void, env) diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index f0516e81f1..7823706e9c 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -153,6 +153,15 @@ void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr, do_stby_e(env, addr, val, true, GETPC()); } +void HELPER(ldc_check)(target_ulong addr) +{ + if (unlikely(addr & 0xf)) { + qemu_log_mask(LOG_GUEST_ERROR, + "Undefined ldc to unaligned address mod 16: " + TARGET_FMT_lx "\n", addr); + } +} + target_ureg HELPER(probe)(CPUHPPAState *env, target_ulong addr, uint32_t level, uint32_t want) { diff --git a/target/hppa/translate.c b/target/hppa/translate.c index f25927aeca..52d7bea1ea 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2942,7 +2942,7 @@ static bool trans_st(DisasContext *ctx, arg_ldst *a) static bool trans_ldc(DisasContext *ctx, arg_ldst *a) { - MemOp mop = MO_TEUL | MO_ALIGN_16 | a->size; + MemOp mop = MO_TE | MO_ALIGN | a->size; TCGv_reg zero, dest, ofs; TCGv_tl addr; @@ -2958,8 +2958,21 @@ static bool trans_ldc(DisasContext *ctx, arg_ldst *a) form_gva(ctx, &addr, &ofs, a->b, a->x, a->scale ? a->size : 0, a->disp, a->sp, a->m, ctx->mmu_idx == MMU_PHYS_IDX); + + /* + * For hppa1.1, LDCW is undefined unless aligned mod 16. + * However actual hardware succeeds with aligned mod 4. + * Detect this case and log a GUEST_ERROR. + * + * TODO: HPPA64 relaxes the over-alignment requirement + * with the ,co completer. + */ + gen_helper_ldc_check(addr); + zero = tcg_const_reg(0); tcg_gen_atomic_xchg_reg(dest, addr, zero, ctx->mmu_idx, mop); + tcg_temp_free(zero); + if (a->m) { save_gpr(ctx, a->b, ofs); } |