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| author | Richard Henderson <rth@twiddle.net> | 2016-11-18 11:50:59 +0100 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:06:11 -0800 |
| commit | 069ea736b50b75fdec99c9b8cc603b97bd98419e (patch) | |
| tree | c2d717658df79279163c7c333aa1c4b3e043c1f5 /tcg/arm | |
| parent | f69d277ece43c42c7ab0144c2ff05ba740f6706b (diff) | |
| download | focaccia-qemu-069ea736b50b75fdec99c9b8cc603b97bd98419e.tar.gz focaccia-qemu-069ea736b50b75fdec99c9b8cc603b97bd98419e.zip | |
tcg: Pass the opcode width to target_parse_constraint
This will let us choose how to interpret a given constraint depending on whether the opcode is 32- or 64-bit. Which will let us share more constraint combinations between opcodes. At the same time, change the interface to return the advanced pointer instead of passing it in/out by reference. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/arm')
| -rw-r--r-- | tcg/arm/tcg-target.inc.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index eeabcf828f..ec0b861297 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -114,12 +114,10 @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type, #define TCG_CT_CONST_ZERO 0x800 /* parse target specific constraints */ -static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) +static const char *target_parse_constraint(TCGArgConstraint *ct, + const char *ct_str, TCGType type) { - const char *ct_str; - - ct_str = *pct_str; - switch (ct_str[0]) { + switch (*ct_str++) { case 'I': ct->ct |= TCG_CT_CONST_ARM; break; @@ -172,12 +170,9 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) break; default: - return -1; + return NULL; } - ct_str++; - *pct_str = ct_str; - - return 0; + return ct_str; } static inline uint32_t rotl(uint32_t val, int n) |