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| author | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-03-14 16:47:49 -0500 |
| commit | aea6ff7fa07b046fb9f43d6262d6e34b77e8437e (patch) | |
| tree | dd3043d1742273a95fa7fc5e99b8d5ffe0c710e5 /tcg/mips/tcg-target.c | |
| parent | 9e4dd565b46749d5e6d5cf87bfd84f1917c68319 (diff) | |
| parent | dd83b06ae61cfa2dc4381ab49f365bd0995fc930 (diff) | |
| download | focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.tar.gz focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.zip | |
Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging
* afaerber/qom-cpu.v5: (43 commits) qom: Introduce CPU class Rename CPUState -> CPUArchState xtensa hw/: Don't use CPUState sparc hw/: Don't use CPUState sh4 hw/: Don't use CPUState s390x hw/: Don't use CPUState ppc hw/: Don't use CPUState mips hw/: Don't use CPUState microblaze hw/: Don't use CPUState m68k hw/: Don't use CPUState lm32 hw/: Don't use CPUState i386 hw/: Don't use CPUState cris hw/: Don't use CPUState arm hw/: Don't use CPUState alpha hw/: Don't use CPUState xtensa-semi: Don't use CPUState m68k-semi: Don't use CPUState arm-semi: Don't use CPUState target-xtensa: Don't overuse CPUState target-unicore32: Don't overuse CPUState ...
Diffstat (limited to 'tcg/mips/tcg-target.c')
| -rw-r--r-- | tcg/mips/tcg-target.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index c5c32825f0..c6aa5bced5 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -827,7 +827,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, TCG_AREG0); tcg_out_opc_imm(s, OPC_LW, TCG_REG_AT, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addr_read) + addr_meml); + offsetof(CPUArchState, tlb_table[mem_index][0].addr_read) + addr_meml); tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T0, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); tcg_out_opc_reg(s, OPC_AND, TCG_REG_T0, TCG_REG_T0, addr_regl); @@ -837,7 +837,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, tcg_out_nop(s); tcg_out_opc_imm(s, OPC_LW, TCG_REG_AT, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addr_read) + addr_memh); + offsetof(CPUArchState, tlb_table[mem_index][0].addr_read) + addr_memh); label1_ptr = s->code_ptr; tcg_out_opc_br(s, OPC_BEQ, addr_regh, TCG_REG_AT); @@ -893,7 +893,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, reloc_pc16(label1_ptr, (tcg_target_long) s->code_ptr); tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addend)); + offsetof(CPUArchState, tlb_table[mem_index][0].addend)); tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_V0, TCG_REG_A0, addr_regl); #else if (GUEST_BASE == (int16_t)GUEST_BASE) { @@ -1013,7 +1013,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, TCG_AREG0); tcg_out_opc_imm(s, OPC_LW, TCG_REG_AT, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addr_write) + addr_meml); + offsetof(CPUArchState, tlb_table[mem_index][0].addr_write) + addr_meml); tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T0, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); tcg_out_opc_reg(s, OPC_AND, TCG_REG_T0, TCG_REG_T0, addr_regl); @@ -1023,7 +1023,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, tcg_out_nop(s); tcg_out_opc_imm(s, OPC_LW, TCG_REG_AT, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addr_write) + addr_memh); + offsetof(CPUArchState, tlb_table[mem_index][0].addr_write) + addr_memh); label1_ptr = s->code_ptr; tcg_out_opc_br(s, OPC_BEQ, addr_regh, TCG_REG_AT); @@ -1080,7 +1080,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, reloc_pc16(label1_ptr, (tcg_target_long) s->code_ptr); tcg_out_opc_imm(s, OPC_LW, TCG_REG_A0, TCG_REG_A0, - offsetof(CPUState, tlb_table[mem_index][0].addend)); + offsetof(CPUArchState, tlb_table[mem_index][0].addend)); tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, addr_regl); #else if (GUEST_BASE == (int16_t)GUEST_BASE) { @@ -1529,6 +1529,6 @@ static void tcg_target_init(TCGContext *s) tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP); /* stack pointer */ tcg_add_target_add_op_defs(mips_op_defs); - tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf), + tcg_set_frame(s, TCG_AREG0, offsetof(CPUArchState, temp_buf), CPU_TEMP_BUF_NLONGS * sizeof(long)); } |