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| author | Richard Henderson <rth@twiddle.net> | 2016-11-18 11:50:59 +0100 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:06:11 -0800 |
| commit | 069ea736b50b75fdec99c9b8cc603b97bd98419e (patch) | |
| tree | c2d717658df79279163c7c333aa1c4b3e043c1f5 /tcg/mips | |
| parent | f69d277ece43c42c7ab0144c2ff05ba740f6706b (diff) | |
| download | focaccia-qemu-069ea736b50b75fdec99c9b8cc603b97bd98419e.tar.gz focaccia-qemu-069ea736b50b75fdec99c9b8cc603b97bd98419e.zip | |
tcg: Pass the opcode width to target_parse_constraint
This will let us choose how to interpret a given constraint depending on whether the opcode is 32- or 64-bit. Which will let us share more constraint combinations between opcodes. At the same time, change the interface to return the advanced pointer instead of passing it in/out by reference. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/mips')
| -rw-r--r-- | tcg/mips/tcg-target.inc.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index a8f031a5a4..ea20891e30 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -186,12 +186,10 @@ static inline bool is_p2m1(tcg_target_long val) } /* parse target specific constraints */ -static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) +static const char *target_parse_constraint(TCGArgConstraint *ct, + const char *ct_str, TCGType type) { - const char *ct_str; - - ct_str = *pct_str; - switch(ct_str[0]) { + switch(*ct_str++) { case 'r': ct->ct |= TCG_CT_REG; tcg_regset_set(ct->u.regs, 0xffffffff); @@ -238,11 +236,9 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) ct->ct |= TCG_CT_CONST_ZERO; break; default: - return -1; + return NULL; } - ct_str++; - *pct_str = ct_str; - return 0; + return ct_str; } /* test if a constant matches the constraint */ |