diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2017-01-12 13:21:32 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-01-12 13:21:32 +0000 |
| commit | 0f2d17c1a59c9f11e7a874fb56fee3714b101705 (patch) | |
| tree | e8f7715c908e76b3ba384b0c509cff55d0d19938 /tcg/optimize.c | |
| parent | 204febd17f9ebb9e94b1980b42c7f2c2307851c1 (diff) | |
| parent | 993508e43e6d180e9ba9b747a9657eac69aec5bb (diff) | |
| download | focaccia-qemu-0f2d17c1a59c9f11e7a874fb56fee3714b101705.tar.gz focaccia-qemu-0f2d17c1a59c9f11e7a874fb56fee3714b101705.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170110' into staging
TCG opcodes for extract, clz, ctz, ctpop # gpg: Signature made Wed 11 Jan 2017 02:12:41 GMT # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170110: (65 commits) tcg/i386: Handle ctpop opcode tcg/ppc: Handle ctpop opcode tcg: Use ctpop to generate ctz if needed tests: New test-bitcnt qemu/host-utils.h: Reduce the operation count in the fallback ctpop target-i386: Use ctpop helper target-tilegx: Use ctpop helper target-sparc: Use ctpop helper target-s390x: Avoid a loop for popcnt target-ppc: Use ctpop helper target-alpha: Use ctpop helper tcg: Add opcode for ctpop target-xtensa: Use clrsb helper target-tricore: Use clrsb helper target-arm: Use clrsb helper tcg: Add helpers for clrsb tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR tcg/i386: Handle ctz and clz opcodes tcg/i386: Allow bmi2 shiftx to have non-matching operands tcg/i386: Hoist common arguments in tcg_out_op ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/optimize.c')
| -rw-r--r-- | tcg/optimize.c | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/tcg/optimize.c b/tcg/optimize.c index 0f1349086b..adfc56ce62 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -296,6 +296,24 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) CASE_OP_32_64(nor): return ~(x | y); + case INDEX_op_clz_i32: + return (uint32_t)x ? clz32(x) : y; + + case INDEX_op_clz_i64: + return x ? clz64(x) : y; + + case INDEX_op_ctz_i32: + return (uint32_t)x ? ctz32(x) : y; + + case INDEX_op_ctz_i64: + return x ? ctz64(x) : y; + + case INDEX_op_ctpop_i32: + return ctpop32(x); + + case INDEX_op_ctpop_i64: + return ctpop64(x); + CASE_OP_32_64(ext8s): return (int8_t)x; @@ -878,11 +896,41 @@ void tcg_optimize(TCGContext *s) temps[args[2]].mask); break; + CASE_OP_32_64(extract): + mask = extract64(temps[args[1]].mask, args[2], args[3]); + if (args[2] == 0) { + affected = temps[args[1]].mask & ~mask; + } + break; + CASE_OP_32_64(sextract): + mask = sextract64(temps[args[1]].mask, args[2], args[3]); + if (args[2] == 0 && (tcg_target_long)mask >= 0) { + affected = temps[args[1]].mask & ~mask; + } + break; + CASE_OP_32_64(or): CASE_OP_32_64(xor): mask = temps[args[1]].mask | temps[args[2]].mask; break; + case INDEX_op_clz_i32: + case INDEX_op_ctz_i32: + mask = temps[args[2]].mask | 31; + break; + + case INDEX_op_clz_i64: + case INDEX_op_ctz_i64: + mask = temps[args[2]].mask | 63; + break; + + case INDEX_op_ctpop_i32: + mask = 32 | 31; + break; + case INDEX_op_ctpop_i64: + mask = 64 | 63; + break; + CASE_OP_32_64(setcond): case INDEX_op_setcond2_i32: mask = 1; @@ -996,6 +1044,7 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(ext8u): CASE_OP_32_64(ext16s): CASE_OP_32_64(ext16u): + CASE_OP_32_64(ctpop): case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: case INDEX_op_ext_i32_i64: @@ -1039,6 +1088,20 @@ void tcg_optimize(TCGContext *s) } goto do_default; + CASE_OP_32_64(clz): + CASE_OP_32_64(ctz): + if (temp_is_const(args[1])) { + TCGArg v = temps[args[1]].val; + if (v != 0) { + tmp = do_constant_folding(opc, v, 0); + tcg_opt_gen_movi(s, op, args, args[0], tmp); + } else { + tcg_opt_gen_mov(s, op, args, args[0], args[2]); + } + break; + } + goto do_default; + CASE_OP_32_64(deposit): if (temp_is_const(args[1]) && temp_is_const(args[2])) { tmp = deposit64(temps[args[1]].val, args[3], args[4], @@ -1048,6 +1111,22 @@ void tcg_optimize(TCGContext *s) } goto do_default; + CASE_OP_32_64(extract): + if (temp_is_const(args[1])) { + tmp = extract64(temps[args[1]].val, args[2], args[3]); + tcg_opt_gen_movi(s, op, args, args[0], tmp); + break; + } + goto do_default; + + CASE_OP_32_64(sextract): + if (temp_is_const(args[1])) { + tmp = sextract64(temps[args[1]].val, args[2], args[3]); + tcg_opt_gen_movi(s, op, args, args[0], tmp); + break; + } + goto do_default; + CASE_OP_32_64(setcond): tmp = do_constant_folding_cond(opc, args[1], args[2], args[3]); if (tmp != 2) { @@ -1076,6 +1155,21 @@ void tcg_optimize(TCGContext *s) tcg_opt_gen_mov(s, op, args, args[0], args[4-tmp]); break; } + if (temp_is_const(args[3]) && temp_is_const(args[4])) { + tcg_target_ulong tv = temps[args[3]].val; + tcg_target_ulong fv = temps[args[4]].val; + TCGCond cond = args[5]; + if (fv == 1 && tv == 0) { + cond = tcg_invert_cond(cond); + } else if (!(tv == 1 && fv == 0)) { + goto do_default; + } + args[3] = cond; + op->opc = opc = (opc == INDEX_op_movcond_i32 + ? INDEX_op_setcond_i32 + : INDEX_op_setcond_i64); + nb_iargs = 2; + } goto do_default; case INDEX_op_add2_i32: |