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authorRichard Henderson <richard.henderson@linaro.org>2020-09-03 15:56:24 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-10-08 05:57:32 -0500
commit74a117906b87ff9220e4baae5a7431d6f4eadd45 (patch)
treed99fbe2a152523b0dd5b73fbd22e46aa2bdfd7cf /tcg/ppc
parent66792f90f14fef18b25a168922877a367ecdca05 (diff)
downloadfocaccia-qemu-74a117906b87ff9220e4baae5a7431d6f4eadd45.tar.gz
focaccia-qemu-74a117906b87ff9220e4baae5a7431d6f4eadd45.zip
tcg: Remove TCG_CT_REG
This wasn't actually used for anything, really.  All variable
operands must accept registers, and which are indicated by the
set in TCGArgConstraint.regs.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
-rw-r--r--tcg/ppc/tcg-target.c.inc5
1 files changed, 0 insertions, 5 deletions
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 0bd947b788..18ee989f95 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -224,19 +224,15 @@ static const char *target_parse_constraint(TCGArgConstraint *ct,
 {
     switch (*ct_str++) {
     case 'A': case 'B': case 'C': case 'D':
-        ct->ct |= TCG_CT_REG;
         tcg_regset_set_reg(ct->regs, 3 + ct_str[0] - 'A');
         break;
     case 'r':
-        ct->ct |= TCG_CT_REG;
         ct->regs = 0xffffffff;
         break;
     case 'v':
-        ct->ct |= TCG_CT_REG;
         ct->regs = 0xffffffff00000000ull;
         break;
     case 'L':                   /* qemu_ld constraint */
-        ct->ct |= TCG_CT_REG;
         ct->regs = 0xffffffff;
         tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
 #ifdef CONFIG_SOFTMMU
@@ -245,7 +241,6 @@ static const char *target_parse_constraint(TCGArgConstraint *ct,
 #endif
         break;
     case 'S':                   /* qemu_st constraint */
-        ct->ct |= TCG_CT_REG;
         ct->regs = 0xffffffff;
         tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
 #ifdef CONFIG_SOFTMMU