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authorRichard Henderson <richard.henderson@linaro.org>2025-01-12 13:37:28 -0800
committerRichard Henderson <richard.henderson@linaro.org>2025-04-28 13:40:17 -0700
commitb3b139766424d022dc3455b711837dc6acf0724b (patch)
tree9dca00e7733dbf9f379029b9fe2e3b67bfaf0939 /tcg/ppc
parent1e6fec9dd90756b22331a3c4c6859c51ad3a2c3e (diff)
downloadfocaccia-qemu-b3b139766424d022dc3455b711837dc6acf0724b.tar.gz
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tcg: Convert extrh_i64_i32 to TCGOutOpUnary
At the same time, make extrh_i64_i32 mandatory.  This closes a hole
in which move arguments could be cast between TCGv_i32 and TCGv_i64.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
-rw-r--r--tcg/ppc/tcg-target.c.inc12
1 files changed, 12 insertions, 0 deletions
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index bb03efe055..ba6d7556f7 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -2965,6 +2965,18 @@ static void tgen_eqv(TCGContext *s, TCGType type,
     tcg_out32(s, EQV | SAB(a1, a0, a2));
 }
 
+#if TCG_TARGET_REG_BITS == 64
+static void tgen_extrh_i64_i32(TCGContext *s, TCGType t, TCGReg a0, TCGReg a1)
+{
+    tcg_out_shri64(s, a0, a1, 32);
+}
+
+static const TCGOutOpUnary outop_extrh_i64_i32 = {
+    .base.static_constraint = C_O1_I1(r, r),
+    .out_rr = tgen_extrh_i64_i32,
+};
+#endif
+
 static void tgen_divs(TCGContext *s, TCGType type,
                       TCGReg a0, TCGReg a1, TCGReg a2)
 {