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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 13:26:51 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:18:04 +0100 |
| commit | d0e66c897f2cdfb0807b76567a17d7811487fac3 (patch) | |
| tree | 32008e904c4781188f591a9314af234095c5dfcd /tcg/ppc | |
| parent | 678155b2c50aa3bf37abef6bfe914bf58f49bec2 (diff) | |
| download | focaccia-qemu-d0e66c897f2cdfb0807b76567a17d7811487fac3.tar.gz focaccia-qemu-d0e66c897f2cdfb0807b76567a17d7811487fac3.zip | |
tcg: Split out tcg_out_ext8u
We will need a backend interface for performing 8-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
| -rw-r--r-- | tcg/ppc/tcg-target.c.inc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 573067e535..ec8e5a1a8a 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -780,6 +780,11 @@ static void tcg_out_ext8s(TCGContext *s, TCGType type, TCGReg dst, TCGReg src) tcg_out32(s, EXTSB | RA(dst) | RS(src)); } +static void tcg_out_ext8u(TCGContext *s, TCGReg dst, TCGReg src) +{ + tcg_out32(s, ANDI | SAI(src, dst, 0xff)); +} + static inline void tcg_out_ext16s(TCGContext *s, TCGReg dst, TCGReg src) { tcg_out32(s, EXTSH | RA(dst) | RS(src)); @@ -3123,6 +3128,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_goto_tb: /* Always emitted via tcg_out_goto_tb. */ case INDEX_op_ext8s_i32: /* Always emitted via tcg_reg_alloc_op. */ case INDEX_op_ext8s_i64: + case INDEX_op_ext8u_i32: + case INDEX_op_ext8u_i64: default: g_assert_not_reached(); } |