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| author | malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-23 20:01:23 +0000 |
|---|---|---|
| committer | malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-23 20:01:23 +0000 |
| commit | e46b9681e5d69f632c4edc8dc2571cb0f68ee165 (patch) | |
| tree | 4a572b39e4716aed2583bfdf09a56fbeba069e6a /tcg/ppc | |
| parent | 1d58ee9f3b9fa56639ab28a7756ee4c27ccd463c (diff) | |
| download | focaccia-qemu-e46b9681e5d69f632c4edc8dc2571cb0f68ee165.tar.gz focaccia-qemu-e46b9681e5d69f632c4edc8dc2571cb0f68ee165.zip | |
Provide extNs_M instructions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4934 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/ppc')
| -rw-r--r-- | tcg/ppc/tcg-target.c | 10 | ||||
| -rw-r--r-- | tcg/ppc/tcg-target.h | 2 |
2 files changed, 12 insertions, 0 deletions
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 0dcf612258..7dfb17f2cf 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -1339,6 +1339,13 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, tcg_out_qemu_st(s, args, 3); break; + case INDEX_op_ext8s_i32: + tcg_out32 (s, EXTSB | RS (args[1]) | RA (args[0])); + break; + case INDEX_op_ext16s_i32: + tcg_out32 (s, EXTSH | RS (args[1]) | RA (args[0])); + break; + default: tcg_dump_ops (s, stderr); tcg_abort (); @@ -1415,6 +1422,9 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_qemu_st64, { "M", "M", "M", "M" } }, #endif + { INDEX_op_ext8s_i32, { "r", "r" } }, + { INDEX_op_ext16s_i32, { "r", "r" } }, + { -1 }, }; diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index db1b12170d..e21b9926da 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -71,6 +71,8 @@ enum { /* optional instructions */ #define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_div_i32 +#define TCG_TARGET_HAS_ext8s_i32 +#define TCG_TARGET_HAS_ext16s_i32 #define TCG_AREG0 TCG_REG_R27 #define TCG_AREG1 TCG_REG_R24 |