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authorNicholas Piggin <npiggin@gmail.com>2022-05-19 23:59:07 +1000
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-05-26 17:11:33 -0300
commitfc879703f74851e3e861894a0c4a6902877d0c2c (patch)
treec89c90648ed2a06608fa3665051e2b1263e8d262 /tcg/ppc
parent9d82353826422ed0e34ad76961fe0cae5f67e58e (diff)
downloadfocaccia-qemu-fc879703f74851e3e861894a0c4a6902877d0c2c.tar.gz
focaccia-qemu-fc879703f74851e3e861894a0c4a6902877d0c2c.zip
tcg/ppc: Optimize memory ordering generation with lwsync
lwsync orders more than just LD_LD, importantly it matches x86 and
s390 default memory ordering.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220519135908.21282-4-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'tcg/ppc')
-rw-r--r--tcg/ppc/tcg-target.c.inc9
1 files changed, 6 insertions, 3 deletions
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 4750091c9c..de4483e43b 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -1832,11 +1832,14 @@ static void tcg_out_brcond2 (TCGContext *s, const TCGArg *args,
 
 static void tcg_out_mb(TCGContext *s, TCGArg a0)
 {
-    uint32_t insn = HWSYNC;
-    a0 &= TCG_MO_ALL;
-    if (a0 == TCG_MO_LD_LD) {
+    uint32_t insn;
+
+    if (a0 & TCG_MO_ST_LD) {
+        insn = HWSYNC;
+    } else {
         insn = LWSYNC;
     }
+
     tcg_out32(s, insn);
 }