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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-10-19 11:53:27 +1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-01-05 11:41:28 -0800 |
| commit | aef8540290f46b40f225c9f6d993c77c0697ee7c (patch) | |
| tree | d906d28824fc7e69e53870971eb4b315508f460a /tcg/tcg-internal.h | |
| parent | f01847c251c24beaf3a0a41764d331355d08ab54 (diff) | |
| download | focaccia-qemu-aef8540290f46b40f225c9f6d993c77c0697ee7c.tar.gz focaccia-qemu-aef8540290f46b40f225c9f6d993c77c0697ee7c.zip | |
tcg: Allocate TCGTemp pairs in host memory order
Allocate the first of a pair at the lower address, and the second of a pair at the higher address. This will make it easier to find the beginning of the larger memory block. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg-internal.h')
| -rw-r--r-- | tcg/tcg-internal.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index a9ea27f67a..2c06b5116a 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -62,11 +62,11 @@ static inline unsigned tcg_call_flags(TCGOp *op) #if TCG_TARGET_REG_BITS == 32 static inline TCGv_i32 TCGV_LOW(TCGv_i64 t) { - return temp_tcgv_i32(tcgv_i64_temp(t)); + return temp_tcgv_i32(tcgv_i64_temp(t) + HOST_BIG_ENDIAN); } static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t) { - return temp_tcgv_i32(tcgv_i64_temp(t) + 1); + return temp_tcgv_i32(tcgv_i64_temp(t) + !HOST_BIG_ENDIAN); } #else extern TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit code path is reachable"); |