diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2015-05-15 16:02:08 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-05-15 16:02:08 +0100 |
| commit | 99e7627a70d1a23e30a514e5a4798005cf4eb3aa (patch) | |
| tree | 5fb7817c8d37d5a0c22316ee398749ef244ce881 /tcg/tcg-op.c | |
| parent | 1eeace9c237a729d11c7acd7c0338ab4562af637 (diff) | |
| parent | dfb36305626636e2e07e0c5acd3a002a5419399e (diff) | |
| download | focaccia-qemu-99e7627a70d1a23e30a514e5a4798005cf4eb3aa.tar.gz focaccia-qemu-99e7627a70d1a23e30a514e5a4798005cf4eb3aa.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150514' into staging
Per-memop alignment # gpg: Signature made Thu May 14 20:17:27 2015 BST using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tcg-20150514: tcg: Add MO_ALIGN, MO_UNALN tcg: Push merged memop+mmu_idx parameter to softmmu routines tcg: Merge memop and mmu_idx parameters to qemu_ld/st Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/tcg-op.c')
| -rw-r--r-- | tcg/tcg-op.c | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 2b6be756ba..45098c310e 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1873,15 +1873,14 @@ static inline TCGMemOp tcg_canonicalize_memop(TCGMemOp op, bool is64, bool st) static void gen_ldst_i32(TCGOpcode opc, TCGv_i32 val, TCGv addr, TCGMemOp memop, TCGArg idx) { + TCGMemOpIdx oi = make_memop_idx(memop, idx); #if TARGET_LONG_BITS == 32 - tcg_gen_op4ii_i32(opc, val, addr, memop, idx); + tcg_gen_op3i_i32(opc, val, addr, oi); #else if (TCG_TARGET_REG_BITS == 32) { - tcg_gen_op5ii_i32(opc, val, TCGV_LOW(addr), TCGV_HIGH(addr), - memop, idx); + tcg_gen_op4i_i32(opc, val, TCGV_LOW(addr), TCGV_HIGH(addr), oi); } else { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_I64(addr), - memop, idx); + tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_I64(addr), oi); } #endif } @@ -1889,20 +1888,19 @@ static void gen_ldst_i32(TCGOpcode opc, TCGv_i32 val, TCGv addr, static void gen_ldst_i64(TCGOpcode opc, TCGv_i64 val, TCGv addr, TCGMemOp memop, TCGArg idx) { + TCGMemOpIdx oi = make_memop_idx(memop, idx); #if TARGET_LONG_BITS == 32 if (TCG_TARGET_REG_BITS == 32) { - tcg_gen_op5ii_i32(opc, TCGV_LOW(val), TCGV_HIGH(val), - addr, memop, idx); + tcg_gen_op4i_i32(opc, TCGV_LOW(val), TCGV_HIGH(val), addr, oi); } else { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_I32(addr), - memop, idx); + tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_I32(addr), oi); } #else if (TCG_TARGET_REG_BITS == 32) { - tcg_gen_op6ii_i32(opc, TCGV_LOW(val), TCGV_HIGH(val), - TCGV_LOW(addr), TCGV_HIGH(addr), memop, idx); + tcg_gen_op5i_i32(opc, TCGV_LOW(val), TCGV_HIGH(val), + TCGV_LOW(addr), TCGV_HIGH(addr), oi); } else { - tcg_gen_op4ii_i64(opc, val, addr, memop, idx); + tcg_gen_op3i_i64(opc, val, addr, oi); } #endif } |