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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-07-07 21:41:08 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-07-07 21:41:08 +0100 |
| commit | cd9557616fe30a1926a57b516ee2ceb07faf1cb7 (patch) | |
| tree | 25754275f79cbf99fc8dbf76f28b4eae549d13fd /tcg/tcg-op.c | |
| parent | eb2c66b10efd2b914b56b20ae90655914310c925 (diff) | |
| parent | 852f933e482518797f7785a2e017a215b88df815 (diff) | |
| download | focaccia-qemu-cd9557616fe30a1926a57b516ee2ceb07faf1cb7.tar.gz focaccia-qemu-cd9557616fe30a1926a57b516ee2ceb07faf1cb7.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200706' into staging
Fix for ppc shifts Fix for non-parallel atomic ops # gpg: Signature made Mon 06 Jul 2020 19:49:08 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20200706: tcg: Fix do_nonatomic_op_* vs signed operations tcg/ppc: Sanitize immediate shifts Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/tcg-op.c')
| -rw-r--r-- | tcg/tcg-op.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index e60b74fb82..4b8a473fad 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -3189,8 +3189,9 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val, memop = tcg_canonicalize_memop(memop, 0, 0); - tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN); - gen(t2, t1, val); + tcg_gen_qemu_ld_i32(t1, addr, idx, memop); + tcg_gen_ext_i32(t2, val, memop); + gen(t2, t1, t2); tcg_gen_qemu_st_i32(t2, addr, idx, memop); tcg_gen_ext_i32(ret, (new_val ? t2 : t1), memop); @@ -3232,8 +3233,9 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val, memop = tcg_canonicalize_memop(memop, 1, 0); - tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN); - gen(t2, t1, val); + tcg_gen_qemu_ld_i64(t1, addr, idx, memop); + tcg_gen_ext_i64(t2, val, memop); + gen(t2, t1, t2); tcg_gen_qemu_st_i64(t2, addr, idx, memop); tcg_gen_ext_i64(ret, (new_val ? t2 : t1), memop); |