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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-01-06 20:57:21 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-28 13:40:15 -0700 |
| commit | 3f6b223012f62bb3f73552bea4489383f08cdc23 (patch) | |
| tree | 9164969a08da081a3f8d9488a812dcf7e3dae067 /tcg/tcg.c | |
| parent | 8fb04b8295994e7416a222906939696d496638f3 (diff) | |
| download | focaccia-qemu-3f6b223012f62bb3f73552bea4489383f08cdc23.tar.gz focaccia-qemu-3f6b223012f62bb3f73552bea4489383f08cdc23.zip | |
tcg: Convert nor to TCGOutOpBinary
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg.c')
| -rw-r--r-- | tcg/tcg.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tcg/tcg.c b/tcg/tcg.c index 72e9175d06..d9807b77dc 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1009,6 +1009,8 @@ static const TCGOutOp * const all_outop[NB_OPS] = { OUTOP(INDEX_op_andc, TCGOutOpBinary, outop_andc), OUTOP(INDEX_op_eqv, TCGOutOpBinary, outop_eqv), OUTOP(INDEX_op_nand, TCGOutOpBinary, outop_nand), + OUTOP(INDEX_op_nor_i32, TCGOutOpBinary, outop_nor), + OUTOP(INDEX_op_nor_i64, TCGOutOpBinary, outop_nor), OUTOP(INDEX_op_or, TCGOutOpBinary, outop_or), OUTOP(INDEX_op_orc, TCGOutOpBinary, outop_orc), OUTOP(INDEX_op_xor, TCGOutOpBinary, outop_xor), @@ -2275,8 +2277,6 @@ bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags) return TCG_TARGET_HAS_bswap32_i32; case INDEX_op_not_i32: return TCG_TARGET_HAS_not_i32; - case INDEX_op_nor_i32: - return TCG_TARGET_HAS_nor_i32; case INDEX_op_clz_i32: return TCG_TARGET_HAS_clz_i32; case INDEX_op_ctz_i32: @@ -2342,8 +2342,6 @@ bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags) return TCG_TARGET_HAS_bswap64_i64; case INDEX_op_not_i64: return TCG_TARGET_HAS_not_i64; - case INDEX_op_nor_i64: - return TCG_TARGET_HAS_nor_i64; case INDEX_op_clz_i64: return TCG_TARGET_HAS_clz_i64; case INDEX_op_ctz_i64: @@ -5434,6 +5432,8 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) case INDEX_op_andc: case INDEX_op_eqv: case INDEX_op_nand: + case INDEX_op_nor_i32: + case INDEX_op_nor_i64: case INDEX_op_or: case INDEX_op_orc: case INDEX_op_xor: |