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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-07 08:41:27 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-06-07 08:41:27 -0700 |
| commit | c102e29772186b9b29ccbb4aef0f5cedc46d9870 (patch) | |
| tree | 4d0b40e44d292f92458afdf360178a731c95cda3 /tcg/tci.c | |
| parent | f5e6786de4815751b0a3d2235c760361f228ea48 (diff) | |
| parent | dcc28ab603f30df5cc8be1f759b423e94ae7d10f (diff) | |
| download | focaccia-qemu-c102e29772186b9b29ccbb4aef0f5cedc46d9870.tar.gz focaccia-qemu-c102e29772186b9b29ccbb4aef0f5cedc46d9870.zip | |
Merge tag 'pull-ci-20230607' of https://gitlab.com/rth7680/qemu into staging
Fix TCI regressions vs Int128 Fix Arm build vs --disable-tcg Fix iotest 194. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmSApKodHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/0mAf/f6+JI3tF+CxyWs+J # 5LSDn8hosJefuy+jkhSM/aPIlX5gYvmoA7S/XNGrDG0+yNS5SriZKuyt9hB/gZ5D # JFred7xuI0RmkEX3cnqFgsrtFmOYdx6G5tt4MU25uzKFyPgYg+6hsF0fotcFCPIp # s2XIjEc7X1hk/xr4LRRxJeRrK+ZK48sN+K9HzITclKB3v11Dxv/a0OT2kdrPvlvb # d/yNYewZrxM86vFmlIR/dT+M/qq7ULonlnH1HuWh8IaPO0owEyJPZPFw07C3ivUi # uIplMcqk/2Um1R8zwUgaByINB3uVQXp1PyYsbjxvS34mdLwtYXF8b+/5Ma6tc3Tb # sWkIXg== # =NNK9 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 07 Jun 2023 08:39:22 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-ci-20230607' of https://gitlab.com/rth7680/qemu: iotests: fix 194: filter out racy postcopy-active event gitlab: Add cross-arm64-kvm-only target/arm: Only include tcg/oversized-guest.h if CONFIG_TCG tcg/tci: Adjust call-clobbered regs for int128_t tcg/tci: Adjust passing of MemOpIdx Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci.c')
| -rw-r--r-- | tcg/tci.c | 30 |
1 files changed, 13 insertions, 17 deletions
diff --git a/tcg/tci.c b/tcg/tci.c index 813572ff39..4640902c88 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -106,7 +106,7 @@ static void tci_args_rrm(uint32_t insn, TCGReg *r0, { *r0 = extract32(insn, 8, 4); *r1 = extract32(insn, 12, 4); - *m2 = extract32(insn, 20, 12); + *m2 = extract32(insn, 16, 16); } static void tci_args_rrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2) @@ -141,15 +141,6 @@ static void tci_args_rrrc(uint32_t insn, *c3 = extract32(insn, 20, 4); } -static void tci_args_rrrm(uint32_t insn, - TCGReg *r0, TCGReg *r1, TCGReg *r2, MemOpIdx *m3) -{ - *r0 = extract32(insn, 8, 4); - *r1 = extract32(insn, 12, 4); - *r2 = extract32(insn, 16, 4); - *m3 = extract32(insn, 20, 12); -} - static void tci_args_rrrbb(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, uint8_t *i3, uint8_t *i4) { @@ -929,8 +920,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_args_rrm(insn, &r0, &r1, &oi); taddr = regs[r1]; } else { - tci_args_rrrm(insn, &r0, &r1, &r2, &oi); + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); taddr = tci_uint64(regs[r2], regs[r1]); + oi = regs[r3]; } do_ld_i32: regs[r0] = tci_qemu_ld(env, taddr, oi, tb_ptr); @@ -941,8 +933,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_args_rrm(insn, &r0, &r1, &oi); taddr = (uint32_t)regs[r1]; } else { - tci_args_rrrm(insn, &r0, &r1, &r2, &oi); + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); taddr = (uint32_t)regs[r2]; + oi = regs[r3]; } goto do_ld_i64; case INDEX_op_qemu_ld_a64_i64: @@ -972,8 +965,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_args_rrm(insn, &r0, &r1, &oi); taddr = regs[r1]; } else { - tci_args_rrrm(insn, &r0, &r1, &r2, &oi); + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); taddr = tci_uint64(regs[r2], regs[r1]); + oi = regs[r3]; } do_st_i32: tci_qemu_st(env, taddr, regs[r0], oi, tb_ptr); @@ -985,9 +979,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tmp64 = regs[r0]; taddr = (uint32_t)regs[r1]; } else { - tci_args_rrrm(insn, &r0, &r1, &r2, &oi); + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); tmp64 = tci_uint64(regs[r1], regs[r0]); taddr = (uint32_t)regs[r2]; + oi = regs[r3]; } goto do_st_i64; case INDEX_op_qemu_st_a64_i64: @@ -1293,9 +1288,10 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info) op_name, str_r(r0), str_r(r1), oi); break; case 3: - tci_args_rrrm(insn, &r0, &r1, &r2, &oi); - info->fprintf_func(info->stream, "%-12s %s, %s, %s, %x", - op_name, str_r(r0), str_r(r1), str_r(r2), oi); + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); + info->fprintf_func(info->stream, "%-12s %s, %s, %s, %s", + op_name, str_r(r0), str_r(r1), + str_r(r2), str_r(r3)); break; case 4: tci_args_rrrrr(insn, &r0, &r1, &r2, &r3, &r4); |