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| author | Peter Maydell <peter.maydell@linaro.org> | 2025-07-18 18:30:25 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-07-21 11:13:55 +0100 |
| commit | 279438560ba8575266e9105202c6e87044d24885 (patch) | |
| tree | 2462b62590e53db2908f531439e044773f44bd12 /tests/functional/qemu_test/testcase.py | |
| parent | 86fa06f8d9f953252a7919fa56a402d789bf1b78 (diff) | |
| download | focaccia-qemu-279438560ba8575266e9105202c6e87044d24885.tar.gz focaccia-qemu-279438560ba8575266e9105202c6e87044d24885.zip | |
target/arm: Add BFMIN, BFMAX (predicated)
FEAT_SVE_B16B16 adds bfloat16 versions of the SVE floating point
(predicated) instructions, which are encoded via sz=0b00. Add the
BFMAX and BFMIN insns. These have separate behaviour for AH=1 and
AH=0; we have already implemented the AH=1 helper for the SME2
versions of these insns.
Fixes: 7b1613a1020d2942 ("target/arm: Enable FEAT_SME2p1 on -cpu max")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250718173032.2498900-4-peter.maydell@linaro.org
Diffstat (limited to 'tests/functional/qemu_test/testcase.py')
0 files changed, 0 insertions, 0 deletions