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| author | Shivaprasad G Bhat <sbhat@linux.ibm.com> | 2025-01-17 04:07:01 +0000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2025-03-11 22:43:32 +1000 |
| commit | 5f361ea187ba5f876757d4c90952ff23810f24f5 (patch) | |
| tree | 194f59783b99356ec12c1f1dd78097a88b13dfaa /tests/functional/qemu_test/utils.py | |
| parent | 7ea6e125297050a239b4028cae5ea3ffbc374861 (diff) | |
| download | focaccia-qemu-5f361ea187ba5f876757d4c90952ff23810f24f5.tar.gz focaccia-qemu-5f361ea187ba5f876757d4c90952ff23810f24f5.zip | |
ppc: spapr: Enable 2nd DAWR on Power10 pSeries machine
As per the PAPR, bit 0 of byte 64 in pa-features property indicates availability of 2nd DAWR registers. i.e. If this bit is set, 2nd DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to find whether kvm supports 2nd DAWR or not. If it's supported, allow user to set the pa-feature bit in guest DT using cap-dawr1 machine capability. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Message-ID: <173708681866.1678.11128625982438367069.stgit@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'tests/functional/qemu_test/utils.py')
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