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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-03-19 14:22:46 +0000 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-03-19 14:22:46 +0000 |
| commit | 4dd6517e369828171290b65e11f6a45aeeed15af (patch) | |
| tree | 26ded616ea98684c7bac7ae2d1d26d1691e6b00f /tests/qemu-iotests/iotests.py | |
| parent | a1ba62a0f304291c96939cbf7c38e2ab68770326 (diff) | |
| parent | 3c6712eca07255803b61ca3d632f61a65c078c36 (diff) | |
| download | focaccia-qemu-4dd6517e369828171290b65e11f6a45aeeed15af.tar.gz focaccia-qemu-4dd6517e369828171290b65e11f6a45aeeed15af.zip | |
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging
x86 and machine queue for 5.0 soft freeze Bug fixes: * memory encryption: Disable mem merge (Dr. David Alan Gilbert) Features: * New EPYC CPU definitions (Babu Moger) * Denventon-v2 CPU model (Tao Xu) * New 'note' field on versioned CPU models (Tao Xu) Cleanups: * x86 CPU topology cleanups (Babu Moger) * cpu: Use DeviceClass reset instead of a special CPUClass reset (Peter Maydell) # gpg: Signature made Wed 18 Mar 2020 01:16:43 GMT # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-and-machine-pull-request: hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids hw/i386: Update structures to save the number of nodes per package hw/i386: Remove unnecessary initialization in x86_cpu_new machine: Add SMP Sockets in CpuTopology hw/i386: Consolidate topology functions hw/i386: Introduce X86CPUTopoInfo to contain topology info cpu: Use DeviceClass reset instead of a special CPUClass reset machine/memory encryption: Disable mem merge hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs i386: Add 2nd Generation AMD EPYC processors i386: Add missing cpu feature bits in EPYC model target/i386: Add new property note to versioned CPU models target/i386: Add Denverton-v2 (no MPX) CPU model Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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