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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-02-22 11:26:17 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-02-22 11:26:17 +0000 |
| commit | 98e139bcec7544e2ee66117bd52bbec048fa7e4e (patch) | |
| tree | 3c75b5d5504992548637c52612f31c97563e8014 /tests/tcg/mips/include/wrappers_msa.h | |
| parent | faf840a359edb53485bc710fbb3adca9498655dd (diff) | |
| parent | fb1b0fcc03b0c15bc3580309738280ad9565b6d9 (diff) | |
| download | focaccia-qemu-98e139bcec7544e2ee66117bd52bbec048fa7e4e.tar.gz focaccia-qemu-98e139bcec7544e2ee66117bd52bbec048fa7e4e.zip | |
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-21-2019-v2' into staging
MIPS queue for February 21st, 2019, v2 # gpg: Signature made Thu 21 Feb 2019 18:37:04 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-feb-21-2019-v2: target/mips: fulong2e: Dynamically generate SPD EEPROM data target/mips: fulong2e: Fix bios flash size hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address target/mips: implement QMP query-cpu-definitions command tests/tcg: target/mips: Add wrappers for MSA integer compare instructions tests/tcg: target/mips: Change directory name 'bit-counting' to 'bit-count' tests/tcg: target/mips: Correct path to headers in some test source files hw/misc: mips_itu: Fix 32/64 bit issue in a line involving shift operator Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/tcg/mips/include/wrappers_msa.h')
| -rw-r--r-- | tests/tcg/mips/include/wrappers_msa.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 7a77fb9686..3280f9b084 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -97,5 +97,30 @@ DO_MSA__WD__WS_WT(NOR_V, nor.v) DO_MSA__WD__WS_WT(OR_V, or.v) DO_MSA__WD__WS_WT(XOR_V, xor.v) +DO_MSA__WD__WS_WT(CEQ_B, ceq.b) +DO_MSA__WD__WS_WT(CEQ_H, ceq.h) +DO_MSA__WD__WS_WT(CEQ_W, ceq.w) +DO_MSA__WD__WS_WT(CEQ_D, ceq.d) + +DO_MSA__WD__WS_WT(CLE_S_B, cle_s.b) +DO_MSA__WD__WS_WT(CLE_S_H, cle_s.h) +DO_MSA__WD__WS_WT(CLE_S_W, cle_s.w) +DO_MSA__WD__WS_WT(CLE_S_D, cle_s.d) + +DO_MSA__WD__WS_WT(CLE_U_B, cle_u.b) +DO_MSA__WD__WS_WT(CLE_U_H, cle_u.h) +DO_MSA__WD__WS_WT(CLE_U_W, cle_u.w) +DO_MSA__WD__WS_WT(CLE_U_D, cle_u.d) + +DO_MSA__WD__WS_WT(CLT_S_B, clt_s.b) +DO_MSA__WD__WS_WT(CLT_S_H, clt_s.h) +DO_MSA__WD__WS_WT(CLT_S_W, clt_s.w) +DO_MSA__WD__WS_WT(CLT_S_D, clt_s.d) + +DO_MSA__WD__WS_WT(CLT_U_B, clt_u.b) +DO_MSA__WD__WS_WT(CLT_U_H, clt_u.h) +DO_MSA__WD__WS_WT(CLT_U_W, clt_u.w) +DO_MSA__WD__WS_WT(CLT_U_D, clt_u.d) + #endif |