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| author | Anthony Liguori <aliguori@us.ibm.com> | 2013-03-18 07:34:24 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-03-18 07:34:24 -0500 |
| commit | e531761d63b7f8fe6b6423fafb3616ebbff768aa (patch) | |
| tree | a4ca2537f1e887d8c81ff6820baccb039634d320 /tests/tcg/mips/mips32-dsp/extr_r_w.c | |
| parent | b1999e87b4d42305419329cae459e1b43f706d96 (diff) | |
| parent | 1562e53112fd1082c656a06d953a7447ab17e6e1 (diff) | |
| download | focaccia-qemu-e531761d63b7f8fe6b6423fafb3616ebbff768aa.tar.gz focaccia-qemu-e531761d63b7f8fe6b6423fafb3616ebbff768aa.zip | |
Merge remote-tracking branch 'kraxel/pixman.v8' into staging
# By Gerd Hoffmann (18) and others # Via Blue Swirl (1) and Gerd Hoffmann (1) * kraxel/pixman.v8: (37 commits) console: remove ds_get_* helper functions console: zap color_table console: stop using DisplayState in gfx hardware emulation console: zap displaystate from dcl callbacks cocoa: stop using DisplayState spice: stop using DisplayState sdl: stop using DisplayState vnc: stop using DisplayState gtk: stop using DisplayState console: add surface_*() getters console: rework DisplaySurface handling [dcl/ui side] console: rework DisplaySurface handling [vga emu side] sdl: drop dead code qxl: better vga init in enter_vga_mode qxl: zap qxl0 global spice: zap sdpy global console: kill DisplayState->opaque console: fix displaychangelisteners interface s390: Fix cpu refactoring fallout. target-mips: fix rndrashift_short_acc and code for EXTR_ instructions ...
Diffstat (limited to 'tests/tcg/mips/mips32-dsp/extr_r_w.c')
| -rw-r--r-- | tests/tcg/mips/mips32-dsp/extr_r_w.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips32-dsp/extr_r_w.c b/tests/tcg/mips/mips32-dsp/extr_r_w.c index 02e022427a..489c1931b4 100644 --- a/tests/tcg/mips/mips32-dsp/extr_r_w.c +++ b/tests/tcg/mips/mips32-dsp/extr_r_w.c @@ -67,5 +67,28 @@ int main() assert(dsp == 0); assert(result == rt); + /* Clear dspcontrol */ + dsp = 0; + __asm + ("wrdsp %0\n\t" + : + : "r"(dsp) + ); + + ach = 0xFFFFFFFF; + acl = 0xFFFFFFFF; + result = 0; + __asm + ("mthi %2, $ac1\n\t" + "mtlo %3, $ac1\n\t" + "extr_r.w %0, $ac1, 0x1F\n\t" + "rddsp %1\n\t" + : "=r"(rt), "=r"(dsp) + : "r"(ach), "r"(acl) + ); + dsp = (dsp >> 23) & 0x01; + assert(dsp == 0); + assert(result == rt); + return 0; } |