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authorJia Liu <proljc@gmail.com>2012-10-24 22:17:13 +0800
committerAurelien Jarno <aurelien@aurel32.net>2012-10-31 21:37:21 +0100
commitd70080c4e37fc533fa10904b286f29449decc6f8 (patch)
treee36bed089aa0fd67cb9c17bbff0a0f4aaa148f3f /tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c
parentaf13ae03f8dbc02974d53b11b80b3ae4dd9f30b4 (diff)
downloadfocaccia-qemu-d70080c4e37fc533fa10904b286f29449decc6f8.tar.gz
focaccia-qemu-d70080c4e37fc533fa10904b286f29449decc6f8.zip
target-mips: Add ASE DSP testcases
Add MIPS ASE DSP testcases.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c')
-rw-r--r--tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c b/tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c
new file mode 100644
index 0000000000..3535b37a58
--- /dev/null
+++ b/tests/tcg/mips/mips32-dsp/precrq_rs_ph_w.c
@@ -0,0 +1,35 @@
+#include<stdio.h>
+#include<assert.h>
+
+int main()
+{
+    int rd, rs, rt;
+    int dsp;
+    int result;
+
+    rs = 0x12345678;
+    rt = 0x87654321;
+    result = 0x12348765;
+
+    __asm
+        ("precrq_rs.ph.w %0, %1, %2\n\t"
+         : "=r"(rd)
+         : "r"(rs), "r"(rt)
+        );
+    assert(result == rd);
+
+    rs = 0x7fffC678;
+    rt = 0x865432A0;
+    result = 0x7fff8654;
+
+    __asm
+        ("precrq_rs.ph.w %0, %2, %3\n\t"
+         "rddsp %1\n\t"
+         : "=r"(rd), "=r"(dsp)
+         : "r"(rs), "r"(rt)
+        );
+    assert(((dsp >> 22) & 0x01) == 1);
+    assert(result == rd);
+
+    return 0;
+}