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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-06-03 07:59:15 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-06-05 17:23:09 +0100 |
| commit | d04bf49c9ee8fa3e8f2961462a9f053c3faa8548 (patch) | |
| tree | 81e0e018e45a75ef87eeb7dd244aaebcb5252735 /tests/test-qobject-output-visitor.c | |
| parent | 43fa36c96c24349145497adc1b451f9caf74e344 (diff) | |
| download | focaccia-qemu-d04bf49c9ee8fa3e8f2961462a9f053c3faa8548.tar.gz focaccia-qemu-d04bf49c9ee8fa3e8f2961462a9f053c3faa8548.zip | |
hw/adc/stm32f2xx_adc: Correct memory region size and access size
The ADC region size is 256B, split as: - [0x00 - 0x4f] defined - [0x50 - 0xff] reserved All registers are 32-bit (thus when the datasheet mentions the last defined register is 0x4c, it means its address range is 0x4c .. 0x4f. This model implementation is also 32-bit. Set MemoryRegionOps 'impl' fields. See: 'RM0033 Reference manual Rev 8', Table 10.13.18 "ADC register map". Reported-by: Seth Kintigh <skintigh@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200603055915.17678-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/test-qobject-output-visitor.c')
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