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authorMax Filippov <jcmvbkbc@gmail.com>2019-04-18 16:37:00 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2019-05-15 10:31:52 -0700
commitb345e140534ea17814b02bdf8798f18db6295304 (patch)
treef9320a22da357d31ad10e17a340300b02a389b98 /tests
parent98736654f3dfbf984d9e26c9be0480b0560c1067 (diff)
downloadfocaccia-qemu-b345e140534ea17814b02bdf8798f18db6295304.tar.gz
focaccia-qemu-b345e140534ea17814b02bdf8798f18db6295304.zip
target/xtensa: implement exclusive access option
The Exclusive Instructions provide a general-purpose mechanism for
atomic updates of memory-based synchronization variables that can be
used for exclusion algorithms.

Use cmpxchg-based implementation that is sufficient for the typical use
of exclusive access in atomic operations.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/tcg/xtensa/test_exclusive.S48
1 files changed, 48 insertions, 0 deletions
diff --git a/tests/tcg/xtensa/test_exclusive.S b/tests/tcg/xtensa/test_exclusive.S
new file mode 100644
index 0000000000..7757a552ea
--- /dev/null
+++ b/tests/tcg/xtensa/test_exclusive.S
@@ -0,0 +1,48 @@
+#include "macros.inc"
+
+test_suite exclusive
+
+#if XCHAL_HAVE_EXCLUSIVE
+
+test exclusive_nowrite
+    movi    a2, 0x29
+    wsr     a2, atomctl
+    clrex
+    movi    a2, 1f
+    movi    a3, 1
+    s32ex   a3, a2
+    getex   a3
+    assert  eqi, a3, 0
+    l32i    a3, a2, 0
+    assert  eqi, a3, 3
+
+.data
+.align 4
+1:
+    .word   3
+.text
+test_end
+
+test exclusive_write
+    movi    a2, 0x29
+    wsr     a2, atomctl
+    movi    a2, 1f
+    l32ex   a3, a2
+    assert  eqi, a3, 3
+    movi    a3, 2
+    s32ex   a3, a2
+    getex   a3
+    assert  eqi, a3, 1
+    l32i    a3, a2, 0
+    assert  eqi, a3, 2
+
+.data
+.align 4
+1:
+    .word   3
+.text
+test_end
+
+#endif
+
+test_suite_end