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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-12-03 21:58:34 -0800 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-10 13:28:50 +0000 |
| commit | 64eb9301769c97c7fd340e4e7ef98edcd500ebff (patch) | |
| tree | 080445f0c060f83d3d583f5c148e51f4e4ff2a88 /util/cache-utils.c | |
| parent | a03f742983f9b6ed03913b30005b6f053290d285 (diff) | |
| download | focaccia-qemu-64eb9301769c97c7fd340e4e7ef98edcd500ebff.tar.gz focaccia-qemu-64eb9301769c97c7fd340e4e7ef98edcd500ebff.zip | |
net/cadence_gem: Implement SAR (de)activation
The Specific address registers can be enabled or disabled by software. QEMU was assuming they were always enabled. Implement the disable/enable feature. SARs are disabled by writing to the lower half register. They are re-enabled by then writing the upper half. Reported-by: Deepika Dhamija <deepika@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 49efd1f7450af8f980b967d3054245bae137866c.1386136219.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'util/cache-utils.c')
0 files changed, 0 insertions, 0 deletions