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| author | Bin Meng <bin.meng@windriver.com> | 2020-06-08 07:17:40 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-06-19 08:25:27 -0700 |
| commit | cfa32630d914373413c0b42faf756ccaabc4bbb9 (patch) | |
| tree | 6837bfe195735b0eaee325e139577c33d7f3c2f4 /util/coroutine-sigaltstack.c | |
| parent | 3e9667cdaa7d552bad232b7da0e116c50e15b3b5 (diff) | |
| download | focaccia-qemu-cfa32630d914373413c0b42faf756ccaabc4bbb9.tar.gz focaccia-qemu-cfa32630d914373413c0b42faf756ccaabc4bbb9.zip | |
hw/riscv: sifive_u: Add a new property msel for MSEL pin state
On SiFive FU540 SoC, the value stored at physical address 0x1000 stores the MSEL pin state that is used to control the next boot location that ROM codes jump to. Add a new property msel to sifive_u machine for this. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1591625864-31494-12-git-send-email-bmeng.cn@gmail.com Message-Id: <1591625864-31494-12-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'util/coroutine-sigaltstack.c')
0 files changed, 0 insertions, 0 deletions