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authorPeter Maydell <peter.maydell@linaro.org>2017-07-20 11:00:10 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-07-20 11:00:10 +0100
commit87a60ee84f8abfc26f200ceac86ef32a690b9e21 (patch)
tree539fbda162c7ce53cbbd8c7754aee23485506ec3 /util/oslib-posix.c
parent04b33e21866412689f18b7ad6daf0a54d8f959a7 (diff)
parent9c489ea6bed134fecfd556b439c68bba48fbe102 (diff)
downloadfocaccia-qemu-87a60ee84f8abfc26f200ceac86ef32a690b9e21.tar.gz
focaccia-qemu-87a60ee84f8abfc26f200ceac86ef32a690b9e21.zip
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170719' into staging
Queued tcg and tcg code gen related cleanups

# gpg: Signature made Thu 20 Jul 2017 00:32:00 BST
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-tcg-20170719:
  tcg: Pass generic CPUState to gen_intermediate_code()
  tcg/tci: enable bswap16_i64
  target/alpha: optimize gen_cvtlq() using deposit op
  target/sparc: optimize gen_op_mulscc() using deposit op
  target/sparc: optimize various functions using extract op
  target/ppc: optimize various functions using extract op
  target/m68k: optimize bcd_flags() using extract op
  target/arm: optimize aarch32 rev16
  target/arm: Optimize aarch64 rev16
  coccinelle: add a script to optimize tcg op using tcg_gen_extract()
  coccinelle: ignore ASTs pre-parsed cached C files
  tcg: Expand glue macros before stringifying helper names
  util/cacheinfo: Add missing include for ppc linux
  tcg/mips: reserve a register for the guest_base.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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