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| author | LIU Zhiwei <zhiwei_liu@linux.alibaba.com> | 2023-09-01 14:01:18 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-09-15 05:26:50 -0700 |
| commit | dff1ab68d8c5d4703e07018f504fce6944c529a4 (patch) | |
| tree | 5d47372846025597e5c2581763c6d1d18fb78aeb /util/oslib-posix.c | |
| parent | 0e5903436de712844b0e6cdd862b499c767e09e9 (diff) | |
| download | focaccia-qemu-dff1ab68d8c5d4703e07018f504fce6944c529a4.tar.gz focaccia-qemu-dff1ab68d8c5d4703e07018f504fce6944c529a4.zip | |
accel/tcg: Fix the comment for CPUTLBEntryFull
When memory region is ram, the lower TARGET_PAGE_BITS is not the physical section number. Instead, its value is always 0. Add comment and assert to make it clear. Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-Id: <20230901060118.379-1-zhiwei_liu@linux.alibaba.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'util/oslib-posix.c')
0 files changed, 0 insertions, 0 deletions