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| author | Taylor Simpson <tsimpson@quicinc.com> | 2022-09-20 01:07:46 -0700 |
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| committer | Taylor Simpson <tsimpson@quicinc.com> | 2022-09-30 11:25:37 -0700 |
| commit | e2be9a5c5f65a2cbde4915e29a112439177656d7 (patch) | |
| tree | 6ee0c3f8eb2770fa923f7fc80afaf8d979bd8373 /util/qemu-thread-win32.c | |
| parent | b772528acbd4669a56c8bbc16d78f8f4335c1aa3 (diff) | |
| download | focaccia-qemu-e2be9a5c5f65a2cbde4915e29a112439177656d7.tar.gz focaccia-qemu-e2be9a5c5f65a2cbde4915e29a112439177656d7.zip | |
Hexagon (target/hexagon) Change decision to set pkt_has_store_s[01]
We have found cases where pkt_has_store_s[01] is set incorrectly. This leads to generating an unnecessary store that is left over from a previous packet. Add an attribute to determine if an instruction is a scalar store The attribute is attached to the fSTORE macro (hex_common.py) Update the logic in decode.c that sets pkt_has_store_s[01] Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220920080746.26791-4-tsimpson@quicinc.com>
Diffstat (limited to 'util/qemu-thread-win32.c')
0 files changed, 0 insertions, 0 deletions