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| author | Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> | 2020-02-02 15:34:09 +0000 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2020-02-04 08:51:41 +0100 |
| commit | ec860426dfbebe0c9995e12cd82935a94fde5215 (patch) | |
| tree | 9130b31cfa03a5e183ca3ef9adddc21e77dd4fb4 /util/qemu-timer-common.c | |
| parent | f31160c7d1b89cfb4dd4001a23575b42141cb0ec (diff) | |
| download | focaccia-qemu-ec860426dfbebe0c9995e12cd82935a94fde5215.tar.gz focaccia-qemu-ec860426dfbebe0c9995e12cd82935a94fde5215.zip | |
target/mips: Fix handling of LL/SC instructions after 7dd547e5ab
After 7dd547e5ab6b31e7a0cfc182d3ad131dd55a948f the env->llval value
is loaded as an unsigned value (instead of sign-extended as before).
Therefore, the CMPXCHG in gen_st_cond() in translate.c fails if the
sign bit is set in the loaded value.
Fix this by sign-extending the llval value for the 32-bit case.
I discovered this issue because FreeBSD MIPS64 was looping forever
in an atomic helper function when trying to start /sbin/init.
Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Fixes: 7dd547e5ab ("target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX")
Buglink: https://bugs.launchpad.net/qemu/+bug/1861605
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Aleksandar Markovic <amarkovic@wavecomp.com>
Cc: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Cc: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: James Clarke <jrtc27@jrtc27.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200202153409.28534-1-jrtc27@jrtc27.com>
Diffstat (limited to 'util/qemu-timer-common.c')
0 files changed, 0 insertions, 0 deletions