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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-04-30 19:09:41 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-05-04 12:57:56 +0100 |
| commit | a4e143ac5b9185f670d2f17ee9cc1a430047cb65 (patch) | |
| tree | 5ba4cd90c6f57333ec6dff096c0f64bc175a4da5 /util/qemu-timer.c | |
| parent | 123ce4e3daba26b760b472687e1fb1ad82cf1993 (diff) | |
| download | focaccia-qemu-a4e143ac5b9185f670d2f17ee9cc1a430047cb65.tar.gz focaccia-qemu-a4e143ac5b9185f670d2f17ee9cc1a430047cb65.zip | |
target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree
Convert the Neon 3-reg-same VADD and VSUB insns to decodetree. Note that we don't need the neon_3r_sizes[op] check here because all size values are OK for VADD and VSUB; we'll add this when we convert the first insn that has size restrictions. For this we need one of the GVecGen*Fn typedefs currently in translate-a64.h; move them all to translate.h as a block so they are visible to the 32-bit decoder. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200430181003.21682-15-peter.maydell@linaro.org
Diffstat (limited to 'util/qemu-timer.c')
0 files changed, 0 insertions, 0 deletions