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-rw-r--r--target-i386/cpu.h1
-rw-r--r--target-i386/translate.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 8926780e85..2b2a29d6a5 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -794,6 +794,7 @@ typedef struct {
 #define MAX_GP_COUNTERS    (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0)
 
 #define NB_MMU_MODES 3
+#define TARGET_INSN_START_EXTRA_WORDS 1
 
 #define NB_OPMASK_REGS 8
 
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 9ec9c4c61a..7501b919e3 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7949,7 +7949,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
             tcg_ctx.gen_opc_instr_start[lj] = 1;
             tcg_ctx.gen_opc_icount[lj] = num_insns;
         }
-        tcg_gen_insn_start(pc_ptr);
+        tcg_gen_insn_start(pc_ptr, dc->cc_op);
         num_insns++;
 
         /* If RF is set, suppress an internally generated breakpoint.  */