diff options
| -rw-r--r-- | target-arm/helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 22bf6d3f68..f981569ae2 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3550,6 +3550,10 @@ void arm_cpu_do_interrupt(CPUState *cs) addr += env->cp15.vbar_el[1]; } switch_mode (env, new_mode); + /* For exceptions taken to AArch32 we must clear the SS bit in both + * PSTATE and in the old-state value we save to SPSR_<mode>, so zero it now. + */ + env->uncached_cpsr &= ~PSTATE_SS; env->spsr = cpsr_read(env); /* Clear IT bits. */ env->condexec_bits = 0; |