diff options
| -rwxr-xr-x | configure | 1 | ||||
| -rw-r--r-- | target/hppa/cpu.h | 6 |
2 files changed, 7 insertions, 0 deletions
diff --git a/configure b/configure index 96dee6572c..302fdc92ff 100755 --- a/configure +++ b/configure @@ -6555,6 +6555,7 @@ case "$target_name" in cris) ;; hppa) + mttcg="yes" ;; lm32) ;; diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 70af823a15..7640c81221 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -42,6 +42,12 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 32 #endif +/* PA-RISC 1.x processors have a strong memory model. */ +/* ??? While we do not yet implement PA-RISC 2.0, those processors have + a weak memory model, but with TLB bits that force ordering on a per-page + basis. It's probably easier to fall back to a strong memory model. */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #define CPUArchState struct CPUHPPAState #include "exec/cpu-defs.h" |