diff options
| -rw-r--r-- | tests/qtest/aspeed-hace-utils.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-utils.c index 777fa5b986..539d06e4f8 100644 --- a/tests/qtest/aspeed-hace-utils.c +++ b/tests/qtest/aspeed-hace-utils.c @@ -132,7 +132,7 @@ void aspeed_test_md5(const char *machine, const uint32_t base, { QTestState *s = qtest_init(machine); - uint32_t digest_addr = src_addr + 0x01000000; + uint32_t digest_addr = src_addr + 0x010000; uint8_t digest[16] = {0}; /* Check engine is idle, no busy or irq bits set */ @@ -166,7 +166,7 @@ void aspeed_test_sha256(const char *machine, const uint32_t base, { QTestState *s = qtest_init(machine); - const uint32_t digest_addr = src_addr + 0x1000000; + const uint32_t digest_addr = src_addr + 0x10000; uint8_t digest[32] = {0}; /* Check engine is idle, no busy or irq bits set */ @@ -200,7 +200,7 @@ void aspeed_test_sha512(const char *machine, const uint32_t base, { QTestState *s = qtest_init(machine); - const uint32_t digest_addr = src_addr + 0x1000000; + const uint32_t digest_addr = src_addr + 0x10000; uint8_t digest[64] = {0}; /* Check engine is idle, no busy or irq bits set */ @@ -234,10 +234,10 @@ void aspeed_test_sha256_sg(const char *machine, const uint32_t base, { QTestState *s = qtest_init(machine); - const uint32_t src_addr_1 = src_addr + 0x1000000; - const uint32_t src_addr_2 = src_addr + 0x2000000; - const uint32_t src_addr_3 = src_addr + 0x3000000; - const uint32_t digest_addr = src_addr + 0x4000000; + const uint32_t src_addr_1 = src_addr + 0x10000; + const uint32_t src_addr_2 = src_addr + 0x20000; + const uint32_t src_addr_3 = src_addr + 0x30000; + const uint32_t digest_addr = src_addr + 0x40000; uint8_t digest[32] = {0}; struct AspeedSgList array[] = { { cpu_to_le32(sizeof(test_vector_sg1)), @@ -285,10 +285,10 @@ void aspeed_test_sha512_sg(const char *machine, const uint32_t base, { QTestState *s = qtest_init(machine); - const uint32_t src_addr_1 = src_addr + 0x1000000; - const uint32_t src_addr_2 = src_addr + 0x2000000; - const uint32_t src_addr_3 = src_addr + 0x3000000; - const uint32_t digest_addr = src_addr + 0x4000000; + const uint32_t src_addr_1 = src_addr + 0x10000; + const uint32_t src_addr_2 = src_addr + 0x20000; + const uint32_t src_addr_3 = src_addr + 0x30000; + const uint32_t digest_addr = src_addr + 0x40000; uint8_t digest[64] = {0}; struct AspeedSgList array[] = { { cpu_to_le32(sizeof(test_vector_sg1)), @@ -336,8 +336,8 @@ void aspeed_test_sha256_accum(const char *machine, const uint32_t base, { QTestState *s = qtest_init(machine); - const uint32_t buffer_addr = src_addr + 0x1000000; - const uint32_t digest_addr = src_addr + 0x4000000; + const uint32_t buffer_addr = src_addr + 0x10000; + const uint32_t digest_addr = src_addr + 0x40000; uint8_t digest[32] = {0}; struct AspeedSgList array[] = { { cpu_to_le32(sizeof(test_vector_accum_256) | SG_LIST_LEN_LAST), @@ -377,8 +377,8 @@ void aspeed_test_sha512_accum(const char *machine, const uint32_t base, { QTestState *s = qtest_init(machine); - const uint32_t buffer_addr = src_addr + 0x1000000; - const uint32_t digest_addr = src_addr + 0x4000000; + const uint32_t buffer_addr = src_addr + 0x10000; + const uint32_t digest_addr = src_addr + 0x40000; uint8_t digest[64] = {0}; struct AspeedSgList array[] = { { cpu_to_le32(sizeof(test_vector_accum_512) | SG_LIST_LEN_LAST), |