diff options
| -rw-r--r-- | hw/ppc/spapr_drc.c | 2 | ||||
| -rw-r--r-- | hw/ppc/spapr_hcall.c | 9 | ||||
| -rw-r--r-- | target/ppc/cpu.h | 2 | ||||
| -rw-r--r-- | target/ppc/machine.c | 1 | ||||
| -rw-r--r-- | target/ppc/mmu_helper.c | 2 | ||||
| -rw-r--r-- | target/ppc/translate_init.c | 10 |
6 files changed, 18 insertions, 8 deletions
diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c index 47d94e782a..5260b5d363 100644 --- a/hw/ppc/spapr_drc.c +++ b/hw/ppc/spapr_drc.c @@ -541,7 +541,7 @@ sPAPRDRConnector *spapr_dr_connector_new(Object *owner, const char *type, drc->owner = owner; prop_name = g_strdup_printf("dr-connector[%"PRIu32"]", spapr_drc_index(drc)); - object_property_add_child(owner, prop_name, OBJECT(drc), NULL); + object_property_add_child(owner, prop_name, OBJECT(drc), &error_abort); object_property_set_bool(OBJECT(drc), true, "realized", NULL); g_free(prop_name); diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 72ea5a8247..07b3da8dc4 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1431,11 +1431,10 @@ static target_ulong h_signal_sys_reset(PowerPCCPU *cpu, } else { /* Unicast */ - CPU_FOREACH(cs) { - if (cpu->cpu_dt_id == target) { - run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL); - return H_SUCCESS; - } + cs = CPU(ppc_get_vcpu_by_dt_id(target)); + if (cs) { + run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL); + return H_SUCCESS; } return H_PARAMETER; } diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 6ee2a26a96..46d3dd88f6 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1451,6 +1451,7 @@ void ppc_compat_add_property(Object *obj, const char *name, #define SPR_TEXASR (0x082) #define SPR_TEXASRU (0x083) #define SPR_UCTRL (0x088) +#define SPR_TIDR (0x090) #define SPR_MPC_CMPA (0x090) #define SPR_MPC_CMPB (0x091) #define SPR_MPC_CMPC (0x092) @@ -1770,6 +1771,7 @@ void ppc_compat_add_property(Object *obj, const char *name, #define SPR_IC (0x350) #define SPR_VTB (0x351) #define SPR_MMCRC (0x353) +#define SPR_PSSCR (0x357) #define SPR_440_INV0 (0x370) #define SPR_440_INV1 (0x371) #define SPR_440_INV2 (0x372) diff --git a/target/ppc/machine.c b/target/ppc/machine.c index f578156dd4..abe0a1cdf0 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -239,7 +239,6 @@ static int cpu_post_load(void *opaque, int version_id) ppc_set_compat(cpu, cpu->compat_pvr, &local_err); if (local_err) { error_report_err(local_err); - error_free(local_err); return -1; } } else diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index b7b9088842..f06b9382b4 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -1551,7 +1551,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, env->spr[SPR_40x_ESR] = 0x00000000; break; case POWERPC_MMU_BOOKE206: - booke206_update_mas_tlb_miss(env, address, rw); + booke206_update_mas_tlb_miss(env, address, 2); /* fall through */ case POWERPC_MMU_BOOKE: cs->exception_index = POWERPC_EXCP_ITLB; diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 01723bdfec..8fb407ed73 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8841,6 +8841,16 @@ static void init_proc_POWER9(CPUPPCState *env) gen_spr_power8_book4(env); gen_spr_power8_rpr(env); + /* POWER9 Specific registers */ + spr_register_kvm(env, SPR_TIDR, "TIDR", NULL, NULL, + spr_read_generic, spr_write_generic, + KVM_REG_PPC_TIDR, 0); + + /* FIXME: Filter fields properly based on privilege level */ + spr_register_kvm_hv(env, SPR_PSSCR, "PSSCR", NULL, NULL, NULL, NULL, + spr_read_generic, spr_write_generic, + KVM_REG_PPC_PSSCR, 0); + /* env variables */ #if !defined(CONFIG_USER_ONLY) env->slb_nr = 32; |