diff options
| -rw-r--r-- | target/arm/translate.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 62b1c2081b..7103da2d7a 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9199,11 +9199,6 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc = container_of(dcbase, DisasContext, base); - if (tb_cflags(dc->base.tb) & CF_LAST_IO && dc->condjmp) { - /* FIXME: This can theoretically happen with self-modifying code. */ - cpu_abort(cpu, "IO on conditional branch instruction"); - } - /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ |