3 files changed, 12 insertions, 28 deletions
diff --git a/target-ppc/op.c b/target-ppc/op.c
index 01b944bc7b..95ab8b9fe7 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -233,30 +233,6 @@ void OPPROTO op_mask_spr (void)
     RETURN();
 }
 
-void OPPROTO op_load_lr (void)
-{
-    T0 = env->lr;
-    RETURN();
-}
-
-void OPPROTO op_store_lr (void)
-{
-    env->lr = T0;
-    RETURN();
-}
-
-void OPPROTO op_load_ctr (void)
-{
-    T0 = env->ctr;
-    RETURN();
-}
-
-void OPPROTO op_store_ctr (void)
-{
-    env->ctr = T0;
-    RETURN();
-}
-
 void OPPROTO op_load_tbl (void)
 {
     T0 = cpu_ppc_load_tbl(env);
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 6561304bba..cc1f836c39 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -61,6 +61,8 @@ static TCGv cpu_fpr[32];
 static TCGv cpu_avrh[32], cpu_avrl[32];
 static TCGv cpu_crf[8];
 static TCGv cpu_nip;
+static TCGv cpu_ctr;
+static TCGv cpu_lr;
 
 /* dyngen register indexes */
 static TCGv cpu_T[3];
@@ -168,6 +170,12 @@ void ppc_translate_init(void)
     cpu_nip = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
                                  offsetof(CPUState, nip), "nip");
 
+    cpu_ctr = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
+                                 offsetof(CPUState, ctr), "ctr");
+
+    cpu_lr = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
+                                offsetof(CPUState, lr), "lr");
+
     /* register helpers */
 #undef DEF_HELPER
 #define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name);
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 9393e3b94d..3e103dd3a2 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -110,23 +110,23 @@ static void spr_write_xer (void *opaque, int sprn)
 /* LR */
 static void spr_read_lr (void *opaque, int sprn)
 {
-    gen_op_load_lr();
+    tcg_gen_mov_tl(cpu_T[0], cpu_lr);
 }
 
 static void spr_write_lr (void *opaque, int sprn)
 {
-    gen_op_store_lr();
+    tcg_gen_mov_tl(cpu_lr, cpu_T[0]);
 }
 
 /* CTR */
 static void spr_read_ctr (void *opaque, int sprn)
 {
-    gen_op_load_ctr();
+    tcg_gen_mov_tl(cpu_T[0], cpu_ctr);
 }
 
 static void spr_write_ctr (void *opaque, int sprn)
 {
-    gen_op_store_ctr();
+    tcg_gen_mov_tl(cpu_ctr, cpu_T[0]);
 }
 
 /* User read access to SPR */