diff options
| -rw-r--r-- | target/mips/cpu-defs.c.inc | 4 | ||||
| -rw-r--r-- | target/mips/mips-defs.h | 3 |
2 files changed, 2 insertions, 5 deletions
diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index ba22ff4bcd..9f7bac8793 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -486,8 +486,8 @@ const mips_def_t mips_defs[] = .CP1_fcr31 = (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008), .SEGBITS = 32, .PABITS = 32, - .insn_flags = CPU_NANOMIPS32 | ASE_DSP | ASE_DSP_R2 | ASE_DSP_R3 | - ASE_MT, + .insn_flags = CPU_MIPS32R6 | ISA_NANOMIPS32 | + ASE_DSP | ASE_DSP_R2 | ASE_DSP_R3 | ASE_MT, .mmu_type = MMU_TYPE_R4000, }, #if defined(TARGET_MIPS64) diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index b7879be9e9..3704db8553 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -86,9 +86,6 @@ #define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS_R6) #define CPU_MIPS64R6 (CPU_MIPS64R5 | CPU_MIPS32R6) -/* Wave Computing: "nanoMIPS" */ -#define CPU_NANOMIPS32 (CPU_MIPS32R6 | ISA_NANOMIPS32) - #define CPU_LOONGSON3A (CPU_MIPS64R2 | INSN_LOONGSON3A | ASE_LMMI | ASE_LEXT) /* |