diff options
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/omap1.c | 11 | ||||
| -rw-r--r-- | hw/arm/pic_cpu.c | 20 | ||||
| -rw-r--r-- | hw/arm/pxa2xx.c | 7 | ||||
| -rw-r--r-- | hw/arm/pxa2xx_gpio.c | 5 | ||||
| -rw-r--r-- | hw/arm/pxa2xx_pic.c | 13 |
5 files changed, 32 insertions, 24 deletions
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 6f0a8ca074..3245c62e68 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -1523,7 +1523,7 @@ static inline void omap_clkm_idlect1_update(struct omap_mpu_state_s *s, omap_clk clk; if (value & (1 << 11)) { /* SETARM_IDLE */ - cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HALT); + cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_HALT); } if (!(value & (1 << 10))) /* WKUP_MODE */ qemu_system_shutdown_request(); /* XXX: disable wakeup from IRQ */ @@ -1721,6 +1721,7 @@ static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr, unsigned size) { struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque; + CPUState *cpu = CPU(s->cpu); if (size != 2) { return omap_badwidth_read16(opaque, addr); @@ -1737,8 +1738,9 @@ static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr, return s->clkm.dsp_rstct2; case 0x18: /* DSP_SYSST */ + cpu = CPU(s->cpu); return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start | - (s->cpu->env.halted << 6); /* Quite useless... */ + (cpu->halted << 6); /* Quite useless... */ } OMAP_BAD_REG(addr); @@ -3754,9 +3756,10 @@ static void omap_setup_dsp_mapping(MemoryRegion *system_memory, void omap_mpu_wakeup(void *opaque, int irq, int req) { struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque; + CPUState *cpu = CPU(mpu->cpu); - if (mpu->cpu->env.halted) { - cpu_interrupt(&mpu->cpu->env, CPU_INTERRUPT_EXITTB); + if (cpu->halted) { + cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB); } } diff --git a/hw/arm/pic_cpu.c b/hw/arm/pic_cpu.c index 82236006d2..3a3f06566b 100644 --- a/hw/arm/pic_cpu.c +++ b/hw/arm/pic_cpu.c @@ -15,20 +15,22 @@ static void arm_pic_cpu_handler(void *opaque, int irq, int level) { ARMCPU *cpu = opaque; - CPUARMState *env = &cpu->env; + CPUState *cs = CPU(cpu); switch (irq) { case ARM_PIC_CPU_IRQ: - if (level) - cpu_interrupt(env, CPU_INTERRUPT_HARD); - else - cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + if (level) { + cpu_interrupt(cs, CPU_INTERRUPT_HARD); + } else { + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); + } break; case ARM_PIC_CPU_FIQ: - if (level) - cpu_interrupt(env, CPU_INTERRUPT_FIQ); - else - cpu_reset_interrupt(env, CPU_INTERRUPT_FIQ); + if (level) { + cpu_interrupt(cs, CPU_INTERRUPT_FIQ); + } else { + cpu_reset_interrupt(cs, CPU_INTERRUPT_FIQ); + } break; default: hw_error("arm_pic_cpu_handler: Bad interrupt line %d\n", irq); diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index c0f50c90fe..7467cca4f7 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -263,14 +263,14 @@ static int pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri, case 1: /* Idle */ if (!(s->cm_regs[CCCR >> 2] & (1 << 31))) { /* CPDIS */ - cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HALT); + cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_HALT); break; } /* Fall through. */ case 2: /* Deep-Idle */ - cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HALT); + cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_HALT); s->pm_regs[RCSR >> 2] |= 0x8; /* Set GPR */ goto message; @@ -301,7 +301,8 @@ static int pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri, #endif /* Suspend */ - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT); + cpu_interrupt(CPU(arm_env_get_cpu(cpu_single_env)), + CPU_INTERRUPT_HALT); goto message; diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index eef8411e86..55ebcd724a 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -93,6 +93,7 @@ static const int pxa2xx_gpio_wake[PXA2XX_GPIO_BANKS] = { static void pxa2xx_gpio_set(void *opaque, int line, int level) { PXA2xxGPIOInfo *s = (PXA2xxGPIOInfo *) opaque; + CPUState *cpu = CPU(s->cpu); int bank; uint32_t mask; @@ -118,8 +119,8 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level) pxa2xx_gpio_irq_update(s); /* Wake-up GPIOs */ - if (s->cpu->env.halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) { - cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_EXITTB); + if (cpu->halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) { + cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB); } } diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 145fc78c2f..25e90895e1 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -46,12 +46,13 @@ static void pxa2xx_pic_update(void *opaque) { uint32_t mask[2]; PXA2xxPICState *s = (PXA2xxPICState *) opaque; + CPUState *cpu = CPU(s->cpu); - if (s->cpu->env.halted) { + if (cpu->halted) { mask[0] = s->int_pending[0] & (s->int_enabled[0] | s->int_idle); mask[1] = s->int_pending[1] & (s->int_enabled[1] | s->int_idle); if (mask[0] || mask[1]) { - cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_EXITTB); + cpu_interrupt(cpu, CPU_INTERRUPT_EXITTB); } } @@ -59,15 +60,15 @@ static void pxa2xx_pic_update(void *opaque) mask[1] = s->int_pending[1] & s->int_enabled[1]; if ((mask[0] & s->is_fiq[0]) || (mask[1] & s->is_fiq[1])) { - cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_FIQ); + cpu_interrupt(cpu, CPU_INTERRUPT_FIQ); } else { - cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_FIQ); + cpu_reset_interrupt(cpu, CPU_INTERRUPT_FIQ); } if ((mask[0] & ~s->is_fiq[0]) || (mask[1] & ~s->is_fiq[1])) { - cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD); + cpu_interrupt(cpu, CPU_INTERRUPT_HARD); } else { - cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); } } |